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TBD62083APG - Toshiba

Description: 8 channel sink type DMOS transistor array

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TBD62083APG - Toshiba PCB footprint - Dual-In-Line Packages - Dual-In-Line Packages - P-DIP18-300-2.54-001
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TBD62083APG - Toshiba  - 3D model - Dual-In-Line Packages - P-DIP18-300-2.54-001
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TBD62083APG Details

  • Manufacturer Part Number:

    TBD62083APG

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    DIP-18

  • ECCN Code:

    EAR99

  • HTS Code:

    8542.39.00.60

  • Factory Lead Time:

    20 Weeks

  • Manufacturer:

    Toshiba America Electronic Components

  • YTEOL:

    5.62

  • Built-in Protections:

    TRANSIENT

  • Driver Number of Bits:

    8

  • Interface IC Type:

    BUFFER OR INVERTER BASED PERIPHERAL DRIVER

  • JESD-30 Code:

    R-PDIP-T18

  • Length:

    22.86 mm

  • Number of Functions:

    1

  • Number of Terminals:

    18

  • Operating Temperature-Max:

    85 °C

  • Operating Temperature-Min:

    -40 °C

  • Output Current Flow Direction:

    SINK

  • Output Current-Max:

    0.4 A

  • Output Peak Current Limit-Nom:

    0.4 A

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    DIP

  • Package Equivalence Code:

    DIP18,.3

  • Package Shape:

    RECTANGULAR

  • Package Style:

    IN-LINE

  • Peak Reflow Temperature (Cel):

    NOT SPECIFIED

  • Seated Height-Max:

    4.8 mm

  • Supply Voltage-Max:

    25 V

  • Supply Voltage-Min:

    2.5 V

  • Supply Voltage-Nom:

    5 V

  • Surface Mount:

    NO

  • Technology:

    BCDMOS

  • Temperature Grade:

    INDUSTRIAL

  • Terminal Form:

    THROUGH-HOLE

  • Terminal Pitch:

    2.54 mm

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    NOT SPECIFIED

  • Turn-off Time:

    0.8 µs

  • Turn-on Time:

    0.4 µs

  • Width:

    7.62 mm

TBD62083APG Frequently Asked Questions (FAQs)

  • The recommended PCB layout for the TBD62083APG involves placing the device near the power source, using a solid ground plane, and minimizing the length of the power traces to reduce EMI. A 4-layer PCB with a dedicated power plane and a solid ground plane is recommended.
  • To ensure proper cooling, the TBD62083APG should be mounted on a heat sink with a thermal resistance of 1°C/W or less. The heat sink should be attached to the device using a thermal interface material with a thermal conductivity of 1 W/m-K or higher.
  • The maximum allowed voltage on the input pins of the TBD62083APG is 6.5V. Exceeding this voltage may damage the device.
  • The TBD62083APG requires a specific power sequencing to prevent damage. The recommended power-up sequence is to apply the power supply voltage (VCC) first, followed by the input signals. The power-down sequence should be reversed.
  • The TBD62083APG has an ESD rating of 2 kV for human body model (HBM) and 200 V for machine model (MM).

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TBD62083APG Overview

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