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TIP115G - onsemi

Description: Compact TO-220 AB Package; High DC Current Gain - hFE = 2500 (typ) @ IC = 1.0 Adc; Monolithic Construction with Built-In Base-Emitter Shunt Resistors; Collector-Emitter Sustaining Voltage @ 30 mA VCEO(sus) = 60 Vdc (Min) TIP110, TIP115 VCEO(sus) = 80 Vdc (Min) TIP111, TIP116 VCEO(sus) = 100 Vdc (Min) TIP112, TIP117; Low Collector-Emitter Saturation Voltage VCE(sat) = 2.5 Vdc (Max) @ IC= 2.0 Adc = 4.0 Vdc (Max) @ IC= 5.0 Adc; Pb-Free Packages are Available

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PCB Footprints
TIP115G - onsemi PCB footprint - Transistor Outline, Vertical - Transistor Outline, Vertical - TO−220A
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TIP115G - onsemi  - 3D model - Transistor Outline, Vertical - TO−220A
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TIP115G Details

  • Manufacturer Part Number:

    TIP115G

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    TO-220 3 LEAD STANDARD

  • Pin Count:

    3

  • Manufacturer Package Code:

    221A

  • Country Of Origin:

    Mainland China

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    10 Weeks

  • Manufacturer:

    onsemi

  • YTEOL:

    4

  • Case Connection:

    COLLECTOR

  • Collector Current-Max (IC):

    2 A

  • Collector-Emitter Voltage-Max:

    60 V

  • Configuration:

    DARLINGTON WITH BUILT-IN DIODE AND RESISTOR

  • DC Current Gain-Min (hFE):

    500

  • JEDEC-95 Code:

    TO-220AB

  • JESD-30 Code:

    R-PSFM-T3

  • JESD-609 Code:

    e3

  • Number of Elements:

    1

  • Number of Terminals:

    3

  • Operating Temperature-Max:

    150 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    FLANGE MOUNT

  • Polarity/Channel Type:

    PNP

  • Power Dissipation-Max (Abs):

    50 W

  • Qualification Status:

    Not Qualified

  • Surface Mount:

    NO

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    THROUGH-HOLE

  • Terminal Position:

    SINGLE

  • Transistor Application:

    AMPLIFIER

  • Transistor Element Material:

    SILICON

TIP115G Frequently Asked Questions (FAQs)

  • The maximum safe operating area (SOA) for the TIP115G is not explicitly stated in the datasheet, but it can be estimated based on the device's thermal resistance and maximum junction temperature. A general rule of thumb is to limit the device's power dissipation to 1/4 of the maximum rated power to ensure reliable operation.
  • To ensure the TIP115G is properly biased for linear operation, the base-emitter voltage (VBE) should be set between 0.6V to 0.8V, and the collector-emitter voltage (VCE) should be set between 1V to 5V. Additionally, the base current should be limited to prevent saturation and ensure linear operation.
  • The recommended heatsink design for the TIP115G involves using a thermal interface material (TIM) with a thermal conductivity of at least 1 W/m-K, and a heatsink with a thermal resistance of less than 10°C/W. The heatsink should also be designed to minimize thermal resistance and ensure good airflow.
  • While the TIP115G is primarily designed for linear applications, it can be used in switching applications with some caution. However, the device's switching characteristics, such as turn-on and turn-off times, may not be optimized for high-frequency switching. Additionally, the device's maximum switching frequency should be limited to prevent overheating and ensure reliable operation.
  • To protect the TIP115G from electrostatic discharge (ESD), it is recommended to handle the device with an anti-static wrist strap or mat, and to use ESD-sensitive handling procedures. Additionally, the device should be stored in an anti-static bag or container when not in use.

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TIP115G Overview

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