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TK20J50D - Toshiba

Description: N-ch MOSFET, 500 V, 0.27 Ω@10V, TO-3P(N), π-MOSⅦ

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TK20J50D - Toshiba - PCB symbol
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PCB Footprints
TK20J50D - Toshiba PCB footprint - Other - Other - 2-16C1S
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3D Models
TK20J50D - Toshiba - 3D model - Other - 2-16C1S
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TK20J50D Details

  • Manufacturer Part Number:

    TK20J50D

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Not Recommended

  • Part Package Code:

    SC-65

  • Package Description:

    SC-65, 3 PIN

  • Pin Count:

    3

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    12 Weeks

  • Manufacturer:

    Toshiba America Electronic Components

  • YTEOL:

    3

  • Avalanche Energy Rating (Eas):

    470 mJ

  • Case Connection:

    DRAIN

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    500 V

  • Drain Current-Max (ID):

    20 A

  • Drain-source On Resistance-Max:

    0.27 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • Feedback Cap-Max (Crss):

    11 pF

  • JESD-30 Code:

    R-PSFM-T3

  • Number of Elements:

    1

  • Number of Terminals:

    3

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    150 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    FLANGE MOUNT

  • Peak Reflow Temperature (Cel):

    NOT SPECIFIED

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    280 W

  • Pulsed Drain Current-Max (IDM):

    80 A

  • Surface Mount:

    NO

  • Terminal Form:

    THROUGH-HOLE

  • Terminal Position:

    SINGLE

  • Time@Peak Reflow Temperature-Max (s):

    NOT SPECIFIED

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

TK20J50D Frequently Asked Questions (FAQs)

  • A 2-layer or 4-layer PCB with a thermal relief pattern and a large copper area for heat dissipation is recommended. The device should be placed near a heat sink or a metal plate for optimal thermal performance.
  • The device requires a stable input voltage and a proper bias circuit to ensure optimal operation. A voltage regulator and a bias resistor network can be used to provide a stable input voltage and bias the device.
  • The device is sensitive to electrostatic discharge (ESD) and can be damaged by excessive voltage or current. Handle the device with an anti-static wrist strap or mat, and avoid touching the pins or leads to prevent damage.
  • Use a voltage regulator and a current limiter to protect the device from overvoltage and overcurrent conditions. A fuse or a polyfuse can also be used to protect the device from excessive current.
  • The device has a high power density and requires a thermal design that takes into account the junction-to-case thermal resistance, the case-to-ambient thermal resistance, and the maximum allowable junction temperature.

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TK20J50D Overview

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Part Image TK20J50D(Q) Toshiba America Electronic Components

Power Field-Effect Transistor, 20A I(D), 1-Element, N-Channel, Metal-oxide Semiconductor FET