TLP387(E(T - Toshiba

TLP387(E(T Frequently Asked Questions (FAQs)

• What is the recommended PCB layout for optimal performance of the TLP387(E)?
  Toshiba recommends a 4-layer PCB with a solid ground plane and a separate power plane for the VCC and GND pins. The input and output tracks should be kept short and away from noise sources. A sample PCB layout is available in the application note.
• How do I ensure the TLP387(E) is properly biased for optimal performance?
  The TLP387(E) requires a bias voltage of 3.3V to 5V on the VCC pin. Ensure that the bias voltage is stable and within the recommended range. A decoupling capacitor of 0.1uF to 1uF should be placed close to the VCC pin to filter out noise.
• What is the maximum cable length supported by the TLP387(E)?
  The maximum cable length supported by the TLP387(E) depends on the data rate and cable quality. As a general guideline, Toshiba recommends a maximum cable length of 10m for data rates up to 100Mbps and 5m for data rates up to 400Mbps.
• How do I troubleshoot issues with the TLP387(E)?
  Start by checking the power supply voltage and ensuring that it is within the recommended range. Verify that the input and output signals are within the specified voltage levels. Use an oscilloscope to check for signal integrity and noise. Consult the application note and datasheet for troubleshooting guidelines.
• Is the TLP387(E) compatible with other PHY devices?
  The TLP387(E) is a IEEE 1394-compliant PHY device and is compatible with other IEEE 1394-compliant devices. However, compatibility with other PHY devices may depend on the specific application and system design. Consult the datasheet and application note for more information.