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WM8731CLSEFL - Cirrus Logic

Description: Interface - CODECs Stereo Codec with H/P

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PCB Footprints
WM8731CLSEFL - Cirrus Logic PCB footprint - Quad Flat No-Lead - Quad Flat No-Lead - FL: 28 PIN QFN
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3D Models
WM8731CLSEFL - Cirrus Logic  - 3D model - Quad Flat No-Lead - FL: 28 PIN QFN
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WM8731CLSEFL Details

  • Manufacturer Part Number:

    WM8731CLSEFL

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • Package Description:

    5 X 5 MM, 0.85 MM HEIGHT, 0.50 MM PITCH, LEAD FREE, PLASTIC, MO-220, QFN-28

  • HTS Code:

    8542.39.00.01

  • Manufacturer:

    Cirrus Logic

  • YTEOL:

    0

WM8731CLSEFL Frequently Asked Questions (FAQs)

  • The recommended power-up sequence is to apply the analog power supply (AVDD) first, followed by the digital power supply (DVDD), and then the clock signal. This ensures proper initialization of the device.
  • To configure the WM8731 for master clock mode, set the MCLK pin to the desired clock frequency, and set the BCLK pin to the desired bit clock frequency. Then, set the LRCLK pin to the desired left-right clock frequency. Finally, set the M/S pin to '1' to enable master clock mode.
  • The maximum input voltage for the analog inputs is 2.5V peak-to-peak. Exceeding this voltage may cause distortion or damage to the device.
  • To optimize the WM8731 for low power consumption, set the device to the lowest possible clock frequency, disable any unused features, and use the power-down mode when not in use. Additionally, consider using a lower voltage power supply and optimizing the analog input impedance.
  • The recommended layout and routing for the WM8731 involves keeping the analog and digital signals separate, using a ground plane to reduce noise, and minimizing the length of the clock signal traces. Additionally, use a decoupling capacitor between the power supply pins and the ground pin.

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