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XC3S400AN-4FGG400I - AMD

Description: FPGA - Field Programmable Gate Array XC3S400AN-4FGG400I

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XC3S400AN-4FGG400I - AMD PCB footprint - BGA - BGA - 400-Ball Fine-Pitch BGA (FG400/FGG400) Package
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XC3S400AN-4FGG400I - AMD  - 3D model - BGA - 400-Ball Fine-Pitch BGA (FG400/FGG400) Package
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XC3S400AN-4FGG400I Details

  • Manufacturer Part Number:

    XC3S400AN-4FGG400I

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • Package Description:

    FBGA-400

  • Country Of Origin:

    Taiwan

  • HTS Code:

    8542.31.00.60

  • Factory Lead Time:

    111 Weeks

  • Manufacturer:

    AMD

  • YTEOL:

    0

  • Clock Frequency-Max:

    667 MHz

  • Combinatorial Delay of a CLB-Max:

    0.71 ns

  • JESD-30 Code:

    S-PBGA-B400

  • JESD-609 Code:

    e1

  • Length:

    21 mm

  • Moisture Sensitivity Level:

    3

  • Number of CLBs:

    896

  • Number of Equivalent Gates:

    400000

  • Number of Inputs:

    311

  • Number of Logic Cells:

    8064

  • Number of Outputs:

    248

  • Number of Terminals:

    400

  • Operating Temperature-Max:

    100 °C

  • Operating Temperature-Min:

    -40 °C

  • Organization:

    896 CLBS, 400000 GATES

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    BGA

  • Package Equivalence Code:

    BGA400,20X20,40

  • Package Shape:

    SQUARE

  • Package Style:

    GRID ARRAY

  • Peak Reflow Temperature (Cel):

    250

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    2.43 mm

  • Supply Voltage-Max:

    1.26 V

  • Supply Voltage-Min:

    1.14 V

  • Supply Voltage-Nom:

    1.2 V

  • Surface Mount:

    YES

  • Technology:

    CMOS, 90 nm

  • Temperature Grade:

    INDUSTRIAL

  • Terminal Finish:

    Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5)

  • Terminal Form:

    BALL

  • Terminal Pitch:

    1 mm

  • Terminal Position:

    BOTTOM

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Width:

    21 mm

XC3S400AN-4FGG400I Frequently Asked Questions (FAQs)

  • The maximum operating temperature range for XC3S400AN-4FGG400I is -40°C to 100°C.
  • To implement a CDC in XC3S400AN-4FGG400I, use a synchronizer circuit or a FIFO-based CDC, and ensure that the clock domains are properly isolated.
  • The maximum current draw for XC3S400AN-4FGG400I is approximately 1.5A for the core voltage (VCCINT) and 0.5A for the I/O voltage (VCCO).
  • To optimize power consumption, use power-saving features like clock gating, voltage scaling, and dynamic voltage and frequency scaling (DVFS), and optimize the design for low power consumption.
  • The maximum frequency for the clock input of XC3S400AN-4FGG400I is 350 MHz.

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XC3S400AN-4FGG400I Overview

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Image Part Number Model
Part Image XC3S400A-4FGG400I AMD Xilinx

Field Programmable Gate Array, 896 CLBs, 400000 Gates, 667MHz, 8064-Cell, CMOS, PBGA400

Part Image XC3S400A-4FG400I AMD Xilinx

Field Programmable Gate Array, 896 CLBs, 400000 Gates, 667MHz, 8064-Cell, CMOS, PBGA400

Part Image XA3S400A-4FGG400I AMD Xilinx

Field Programmable Gate Array, 896 CLBs, 400000 Gates, 667MHz, 8064-Cell, CMOS, PBGA400

Part Image XC3S400A-4FGG400I AMD

Field Programmable Gate Array, 896 CLBs, 400000 Gates, 667MHz, 8064-Cell, CMOS, PBGA400

Part Image XC3S400A-4FG400I AMD

Field Programmable Gate Array, 896 CLBs, 400000 Gates, 667MHz, 8064-Cell, CMOS, PBGA400

For a full list of alternate parts for XC3S400AN-4FGG400I, check out Findchips.com