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XC7VX690T-1FFG1761C - AMD

Description: IC FPGA 850 I/O 1761FCBGA

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XC7VX690T-1FFG1761C - AMD PCB footprint - BGA - BGA - FFG1761
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XC7VX690T-1FFG1761C - AMD  - 3D model - BGA - FFG1761
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XC7VX690T-1FFG1761C Details

  • Manufacturer Part Number:

    XC7VX690T-1FFG1761C

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    BGA-1761

  • HTS Code:

    8542.31.00.60

  • Factory Lead Time:

    16 Weeks

  • Manufacturer:

    AMD

  • YTEOL:

    14

  • Clock Frequency-Max:

    1818 MHz

  • Combinatorial Delay of a CLB-Max:

    0.74 ns

  • JESD-30 Code:

    S-PBGA-B1761

  • JESD-609 Code:

    e1

  • Length:

    42.5 mm

  • Number of CLBs:

    54150

  • Number of Inputs:

    850

  • Number of Logic Cells:

    693120

  • Number of Outputs:

    850

  • Number of Terminals:

    1761

  • Operating Temperature-Max:

    85 °C

  • Organization:

    54150 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    BGA

  • Package Equivalence Code:

    BGA1760,42X42,40

  • Package Shape:

    SQUARE

  • Package Style:

    GRID ARRAY

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    3.5 mm

  • Supply Voltage-Max:

    1.03 V

  • Supply Voltage-Min:

    0.97 V

  • Supply Voltage-Nom:

    1 V

  • Surface Mount:

    YES

  • Technology:

    CMOS, 28 nm

  • Temperature Grade:

    OTHER

  • Terminal Finish:

    Tin/Silver/Copper (Sn/Ag/Cu)

  • Terminal Form:

    BALL

  • Terminal Pitch:

    1 mm

  • Terminal Position:

    BOTTOM

  • Width:

    42.5 mm

XC7VX690T-1FFG1761C Frequently Asked Questions (FAQs)

  • The XC7VX690T-1FFG1761C has an industrial temperature range of -40°C to 100°C, and a commercial temperature range of 0°C to 85°C.
  • Xilinx provides a DDR3 memory interface IP core that can be used to implement a DDR3 memory interface on the XC7VX690T-1FFG1761C. The IP core is available in the Vivado Design Suite and can be customized to meet specific design requirements.
  • The XC7VX690T-1FFG1761C has a maximum clock frequency of 500 MHz, but the actual clock frequency depends on the specific design and implementation.
  • Xilinx provides power optimization techniques and tools, such as the Vivado Power Analysis tool, to help reduce power consumption on the XC7VX690T-1FFG1761C. Techniques include clock gating, voltage scaling, and dynamic voltage and frequency scaling.
  • The XC7VX690T-1FFG1761C has a PCIe Gen3 interface with a maximum bandwidth of 8 GT/s per lane, and up to 16 lanes can be implemented, resulting in a maximum bandwidth of 128 GB/s.

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XC7VX690T-1FFG1761C Overview

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Image Part Number Model
Part Image XC7VX690T-1FF1761I AMD

Field Programmable Gate Array, 54150 CLBs, 1818MHz, 693120-Cell, CMOS, PBGA1760

Part Image XC7VX690T-1FF1761I AMD Xilinx

Field Programmable Gate Array, 1818MHz, 693120-Cell, CMOS, PBGA1760

Part Image XC7VX690T-1FFG1761C AMD Xilinx

Field Programmable Gate Array, 54150 CLBs, 1818MHz, 693120-Cell, CMOS, PBGA1761

Part Image XC7VX690T-1FFG1761E AMD Xilinx

Field Programmable Gate Array

Part Image XC7VX690T-1FF1761C AMD Xilinx

Field Programmable Gate Array, 1818MHz, 693120-Cell, CMOS, PBGA1760

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