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XC7VX690T-2FFG1761C - AMD

Description: Virtex®-7 XT Field Programmable Gate Array (FPGA) IC 850 54190080 693120 1760-BBGA, FCBGA

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XC7VX690T-2FFG1761C - AMD PCB footprint - BGA - BGA - FFG1761
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XC7VX690T-2FFG1761C - AMD  - 3D model - BGA - FFG1761
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XC7VX690T-2FFG1761C Details

  • Manufacturer Part Number:

    XC7VX690T-2FFG1761C

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    BGA-1761

  • HTS Code:

    8542.31.00.60

  • Factory Lead Time:

    16 Weeks

  • Manufacturer:

    AMD

  • YTEOL:

    14

  • Clock Frequency-Max:

    1818 MHz

  • Combinatorial Delay of a CLB-Max:

    0.61 ns

  • JESD-30 Code:

    S-PBGA-B1761

  • JESD-609 Code:

    e1

  • Length:

    42.5 mm

  • Number of CLBs:

    54150

  • Number of Inputs:

    850

  • Number of Logic Cells:

    693120

  • Number of Outputs:

    850

  • Number of Terminals:

    1761

  • Operating Temperature-Max:

    85 °C

  • Organization:

    54150 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    BGA

  • Package Equivalence Code:

    BGA1760,42X42,40

  • Package Shape:

    SQUARE

  • Package Style:

    GRID ARRAY

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    3.5 mm

  • Supply Voltage-Max:

    1.03 V

  • Supply Voltage-Min:

    0.97 V

  • Supply Voltage-Nom:

    1 V

  • Surface Mount:

    YES

  • Technology:

    CMOS, 28 nm

  • Temperature Grade:

    OTHER

  • Terminal Finish:

    Tin/Silver/Copper (Sn/Ag/Cu)

  • Terminal Form:

    BALL

  • Terminal Pitch:

    1 mm

  • Terminal Position:

    BOTTOM

  • Width:

    42.5 mm

XC7VX690T-2FFG1761C Frequently Asked Questions (FAQs)

  • The XC7VX690T-2FFG1761C has an industrial temperature range of -40°C to 100°C, and a commercial temperature range of 0°C to 85°C.
  • Xilinx recommends using an external POR circuit or a dedicated POR IC, such as the Xilinx Power Management Controller (PMC), to ensure a reliable power-on reset.
  • Xilinx provides guidelines for PCB layout and routing in the '7 Series FPGAs PCB Design Guide' (UG583). It's essential to follow these guidelines to ensure signal integrity and minimize noise.
  • Optimize power consumption by using power-aware design techniques, such as clock gating, voltage scaling, and dynamic voltage and frequency scaling (DVFS). Additionally, use the Xilinx Power Estimator (XPE) tool to estimate power consumption and identify areas for optimization.
  • The recommended settings depend on the specific application and design requirements. Consult the '7 Series FPGAs Configuration' (UG470) and '7 Series FPGAs Boot and Configuration' (UG585) user guides for guidance on selecting the appropriate configuration options.

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XC7VX690T-2FFG1761C Overview

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