psc1m2fbtb - Infineon
Description: CPU and math: 32-bit Arm® Cortex® -M0 at 48 MHz (0.84 DMIPS/MHz), NVIC with 64 interrupt nodes, MATH coprocessor with 24-bit CORDIC and 32-bit divide • On-chip memory: 8 KB ROM, 16 KB SRAM (parity), up to 200 KB flash (ECC) • Power and reset: 1.8–5.5 V supply, power-on reset, brownout detector • Clocking: on-chip clock monitor, external crystal support (32 kHz/4–20 MHz), internal slow and fast oscillators • System control: window watchdog, real-time clock, pseudorandom number generator • Communica
