DRAMs||Other Memory ICs||Flash Memories||SRAMs Footprint, Symbol and 3D Model search results

Showing 25 of 552034 results

Price & Stock Powered by

Filter by Manufacturer

Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	70V35L15PFG8 Renesas Electronics	1	The 70V35 is a high-speed 8K x 18 Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 36-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode.	Quad Flat Packages	70V35L15PFG8	3D model available Symbol and footprint available 3	1 Download Model
	71V67703S80BQI Renesas Electronics	1	The 71V67703 3.3V CMOS SRAM is organized as 256K x 36. The 71V67703 SRAM contains write, data, address and control registers. There are no registers in the data output path (flow-through architecture). The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM.	BGA	71V67703S80BQI	3D model available Symbol and footprint available 3	1 Download Model
	70V08L15PFG8 Renesas Electronics	1	The 70V08 is a high-speed 64K x 8 Dual-Port Static RAM designed to be used as a stand-alone 512K-bit Dual-Port SRAM or as a combination MASTER/SLAVE Dual-Port SRAM for 16-bit-or-more word systems which results in full speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each port to enter a very low standby power mode.	Quad Flat Packages	70V08L15PFG8	3D model available Symbol and footprint available 3	1 Download Model
	70T651S10BC8 Renesas Electronics	1	The 70T651 is a high-speed 256K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 72-bit-or-more word system which would result in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each port to enter a very low standby power mode.	BGA	70T651S10BC8	3D model available Symbol and footprint available 3	1 Download Model

	71V67703S85BQG8 Renesas Electronics	1	The 71V67703 3.3V CMOS SRAM is organized as 256K x 36. The 71V67703 SRAM contains write, data, address and control registers. There are no registers in the data output path (flow-through architecture). The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM.	BGA	71V67703S85BQG8	3D model available Symbol and footprint available 3	1 Download Model
	7133LA55GB Renesas Electronics	1	The 7133 high-speed 2K x 16 Dual-Port Static RAMs is designed to be used as a stand-alone 16-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with the 7143 "SLAVE" Dual-Port in 32-bit-or-more word width systems. Low-power (LA) versions offer battery backup data retention capability, with each port typically consuming 200μW for a 2V battery. Military grade product in compliance with MIL-PRF-38535 QML is available.	Other	7133LA55GB	3D model available Symbol and footprint available 3	1 Download Model
	7142SA55C Renesas Electronics	1	The 7142 is a high-speed 2K x 8 Dual-Port Static RAM designed to be used as a "SLAVE" Dual-Port RAM together with the 7132 "MASTER" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available.	Ceramic Dual-In-Line Packages	7142SA55C	3D model not available Symbol and footprint available 2	1 Download Model
	70T653MS10BC8 Renesas Electronics	1	The 70T653M is a high-speed 256K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone 18874K-bit Dual-Port RAM. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each port to enter a very low standby power mode.	BGA	70T653MS10BC8	3D model available Symbol and footprint available 3	1 Download Model
	71V3556SA100BQG8 Renesas Electronics	1	The 71V3556 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3556 contains data I/O, address and control signal registers.	BGA	71V3556SA100BQG8	3D model available Symbol and footprint available 3	1 Download Model
	71256L25YG Renesas Electronics	1	The 71256 5V CMOS SRAM is organized as 32K x 8. The circuit also offers a reduced power standby mode for significant system level power and cooling savings. The low-power (L) version also offers a battery backup data retention capability allowing operation off a 2V battery. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. Military grade product is available.	Other	71256L25YG	3D model available Symbol and footprint available 3	1 Download Model
	70V631S10BF8 Renesas Electronics	1	The 70V631 is a high-speed 256K x 18 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 36-bit-or-more word system. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 36-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each po	BGA	70V631S10BF8	3D model available Symbol and footprint available 3	1 Download Model
	71V416S10YG8 Renesas Electronics	1	The 71V416 3.3V CMOS SRAM is organized as 256K x 16. All bidirectional inputs and outputs of the 71V416 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation.	Other	71V416S10YG8	3D model available Symbol and footprint available 3	1 Download Model
	70V9179L7PF Renesas Electronics	1	The 70V9179 is a high-speed 32K x 9 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode.	Quad Flat Packages	70V9179L7PF	3D model available Symbol and footprint available 3	1 Download Model
	71V3558SA133BQG8 Renesas Electronics	1	The 71V3558 3.3V CMOS Synchronous SRAM is organized as 256K x 18. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3558 contains data I/O, address and control signal registers.	BGA	71V3558SA133BQG8	3D model available Symbol and footprint available 3	1 Download Model
	7133SA70GB Renesas Electronics	1	The 7133 high-speed 2K x 16 Dual-Port Static RAMs is designed to be used as a stand-alone 16-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with the 7143 "SLAVE" Dual-Port in 32-bit-or-more word width systems. Low-power (LA) versions offer battery backup data retention capability, with each port typically consuming 200μW for a 2V battery. Military grade product in compliance with MIL-PRF-38535 QML is available.	Other	7133SA70GB	3D model available Symbol and footprint available 3	1 Download Model

	71V3556SA133BQ Renesas Electronics	1	The 71V3556 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3556 contains data I/O, address and control signal registers.	BGA	71V3556SA133BQ	3D model available Symbol and footprint available 3	1 Download Model
	71V3556S166PFGI Renesas Electronics	1	The 71V3556 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3556 contains data I/O, address and control signal registers.	Quad Flat Packages	71V3556S166PFGI	3D model available Symbol and footprint available 3	1 Download Model
	7025L35GB Renesas Electronics	1	The 7025 is a high-speed 8K x 16 Dual-Port Static RAM designed to be used as a stand-alone 128K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 32-bit or more word systems. An automatic power down feature controlled by Chip Enable (CE) permits the on-chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available.	Other	7025L35GB	3D model available Symbol and footprint available 3	1 Download Model
	70V26S55G Renesas Electronics	1	The 70V26 is a high-speed 16K x 16 Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 32-bit or wider memory system applications resulting in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode.	Other	70V26S55G	3D model available Symbol and footprint available 3	1 Download Model
	71V3558S100PFG8 Renesas Electronics	1	The 71V3558 3.3V CMOS Synchronous SRAM is organized as 256K x 18. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3558 contains data I/O, address and control signal registers.	Quad Flat Packages	71V3558S100PFG8	3D model available Symbol and footprint available 3	1 Download Model
	71V424L15YGI8 Renesas Electronics	1	The 71V424 3.3V CMOS SRAM is organized as 512K x 8. All bidirectional inputs and outputs of the 71V424 are TTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation.	Other	71V424L15YGI8	3D model available Symbol and footprint available 3	1 Download Model
	71V65803S100BGG8 Renesas Electronics	1	The 71V65803 3.3V CMOS SRAM organized as 512K X 18. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V65803 contains data I/O, address and control signal registers. In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.	BGA	71V65803S100BGG8	3D model available Symbol and footprint available 3	1 Download Model
	71V3559S80BQI Renesas Electronics	1	The 71V3559 3.3V CMOS Synchronous SRAM is organized as 256K x 18. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3559 contains address, data-in and control signal registers. The outputs are flow-through (no output data register).	BGA	71V3559S80BQI	3D model available Symbol and footprint available 3	1 Download Model
	71V67703S80BQI8 Renesas Electronics	1	The 71V67703 3.3V CMOS SRAM is organized as 256K x 36. The 71V67703 SRAM contains write, data, address and control registers. There are no registers in the data output path (flow-through architecture). The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM.	BGA	71V67703S80BQI8	3D model available Symbol and footprint available 3	1 Download Model
	70V3319S133BCI8 Renesas Electronics	1	The 70V3319 is a high-speed 256K x 18 bit synchronous Dual-Port RAM that has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70V3319 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) is at 3.3V.	BGA	70V3319S133BCI8	3D model available Symbol and footprint available 3	1 Download Model
32 33 34 35 36 37 38 39 40

Can't find what you're looking for? Request this part

DRAMs||Other Memory ICs||Flash Memories||SRAMs Model Download Search Results

Popular SRAMs