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ADC1415S125HN-C18
Renesas Electronics
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1 | The ADC1415S125HN is a single channel 14-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power consumption at sample rates up to 125 Msps. Pipelined architecture and output error correction ensure the ADC1415S is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a single 3 V source, it can handle output logic levels from 1.8 V to 3.3 V in CMOS mode, thanks to a separate digital output supply. The ADC1415S supports the LVDS (L | ADC1415S125HN-C18 |
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ADC1413D065W1-DB
Renesas Electronics
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1 | IDT's ADC demoboard is suitable for dynamic performance evaluations from low to high IF configuration. The FPGA eases the evaluation and analysis of the ADC dynamic and enables use of the full JESD204A feature set. | ADC1413D065W1-DB |
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ADC1415S065HN-C1
Renesas Electronics
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1 | The ADC1415S is a single channel 14-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power consumption at sample rates up to 125 Msps. Pipelined architecture and output error correction ensure the ADC1415S is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a single 3 V source, it can handle output logic levels from 1.8 V to 3.3 V in CMOS mode, thanks to a separate digital output supply. The ADC1415S supports the LVDS (Low Vo | ADC1415S065HN-C1 |
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ADC1410S125HN-C1
Renesas Electronics
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1 | The ADC1410S125HN is a single channel 14-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power consumption at a sample rates of 125 Msps. Pipelined architecture and output error correction ensure the ADC1410S125HN is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a single 3 V source, it can handle output logic levels from 1.8 V to 3.3 V in CMOS mode, thanks to a separate digital output supply. It supports the LVDS (Low Vol | ADC1410S125HN-C1 |
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ADC1410S065HN-C1
Renesas Electronics
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1 | The ADC1410S065HN is a single channel 14-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power consumption at a sample rates of 65 Msps. Pipelined architecture and output error correction ensure the ADC1410S065HN is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a single 3 V source, it can handle output logic levels from 1.8 V to 3.3 V in CMOS mode, thanks to a separate digital output supply. It supports the LVDS (Low Volt | ADC1410S065HN-C1 |
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ADC1410S105HN-C1
Renesas Electronics
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1 | The ADC1410S105HN is a single channel 14-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power consumption at a sample rates of 105 Msps. Pipelined architecture and output error correction ensure the ADC1410S105HN is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a single 3 V source, it can handle output logic levels from 1.8 V to 3.3 V in CMOS mode, thanks to a separate digital output supply. It supports the LVDS (Low Vol | ADC1410S105HN-C1 |
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ADC1413D080HN-C1
Renesas Electronics
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1 | The ADC1413D080HN is a dual channel 14-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power at sample rates of 80 Msps. Pipelined architecture and output error correction ensure the ADC1413D080HN is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a 3.3 V source for analog and a 1.8 V source for the output driver, it has two serial outputs, because of the two lanes of differential outputs, which are compliant with the JESD2 | ADC1413D080HN-C1 |
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ADC1413D065HN-C1
Renesas Electronics
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1 | The ADC1413D065HN is a dual channel 14-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power at sample rates of 65 Msps. Pipelined architecture and output error correction ensure the ADC1413D065HN is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a 3.3 V source for analog and a 1.8 V source for the output driver, it has two serial outputs, because of the two lanes of differential outputs, which are compliant with the JESD2 | ADC1413D065HN-C1 |
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ADC1412D105HN-C1
Renesas Electronics
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1 | The ADC1412D105HN is a dual channel 14-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power consumption at sample rates up to 105 Msps. Pipelined architecture and output error correction ensure the ADC1412D is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a single 3 V source, it can handle output logic levels from 1.8 V to 3.3 V in CMOS mode, thanks to a separate digital output supply. It supports the LVDS (Low Voltage D | ADC1412D105HN-C1 |
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ADC1410S105HN-C18
Renesas Electronics
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1 | The ADC1410S105HN is a single channel 14-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power consumption at a sample rates of 105 Msps. Pipelined architecture and output error correction ensure the ADC1410S105HN is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a single 3 V source, it can handle output logic levels from 1.8 V to 3.3 V in CMOS mode, thanks to a separate digital output supply. It supports the LVDS (Low Vol | ADC1410S105HN-C18 |
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ADC1413D080W1-DB
Renesas Electronics
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1 | IDT's ADC demoboard is suitable for dynamic performance evaluations from low to high IF configuration. The FPGA eases the evaluation and analysis of the ADC dynamic and enables use of the full JESD204A feature set. | ADC1413D080W1-DB |
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ADC1415S080F2-DB
Renesas Electronics
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1 | IDT's ADC demonstration board is suitable for dynamic performance evaluations from low to high IF configuration. A Data acquisition board can be used to easily analyze the ADC performances in the design and prototyping phase. | ADC1415S080F2-DB |
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ADC1412D080F1-DB
Renesas Electronics
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1 | IDT's dual channel ADC demonstration board is suitable for dynamic performances evaluation from low to high IF configuration with LVCMOS outputs. A Data acquisition board can be used to easily analyze the ADC performances in the design and prototyping phase | ADC1412D080F1-DB |
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ADC1412D125F2-DB
Renesas Electronics
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1 | IDT's dual channel ADC demonstration board is suitable for dynamic performances evaluation from low to high IF configuration with LVDS DDR outputs. A Data acquisition board can be used to easily analyze the ADC performances in the design and prototyping phase. | ADC1412D125F2-DB |
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ADC1413D125WO-DB
Renesas Electronics
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1 | Our ADC demonstration board is suitable for dynamic performances evaluation from low to high IF configuration. A FPGA mother board (Xilinx, Altera, and Lattice) could be connected to ease the evaluation and analysis of the ADC dynamic and enable usage of the JESD204A full features sets. | ADC1413D125WO-DB |
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ADC1410S080F1-DB
Renesas Electronics
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1 | IDTs ADC1410S080F1 demoboard is suitable for dynamic performance evaluations from low to high IF configuration with LVCMOS output variants. A data-acquisition board can be used during design and prototype to analyze ADC performance | ADC1410S080F1-DB |
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ADC1413D125HN-C18
Renesas Electronics
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1 | The ADC1413D125HN is a dual channel 14-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power at sample rates of 125 Msps. Pipelined architecture and output error correction ensure the ADC1413D125HN is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a 3.3 V source for analog and a 1.8 V source for the output driver, it has two serial outputs, because of the two lanes of differential outputs, which are compliant with the JESD | ADC1413D125HN-C18 |
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ADC1413D080HN-C18
Renesas Electronics
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1 | The ADC1413D080HN is a dual channel 14-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power at sample rates of 80 Msps. Pipelined architecture and output error correction ensure the ADC1413D080HN is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a 3.3 V source for analog and a 1.8 V source for the output driver, it has two serial outputs, because of the two lanes of differential outputs, which are compliant with the JESD2 | ADC1413D080HN-C18 |
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ADC1410S105F1-DB
Renesas Electronics
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1 | IDTs ADC1410S105F1 demoboard is suitable for dynamic performance evaluations from low to high IF configuration with LVCMOS output variants. A data-acquisition board can be used during design and prototype to analyze ADC performance | ADC1410S105F1-DB |
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ADC1443D160W1-DB
Renesas Electronics
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1 | The IDT ADC demo board is suitable for dynamic performance evaluations from low to high IF configuration. The FPGA eases the evaluation and analysis of the ADC dynamic and enables use of the full JESD204B feature set. | ADC1443D160W1-DB |
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ADC1412D125HN-C1
Renesas Electronics
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1 | The ADC1412D125HN is a dual channel 14-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power consumption at sample rates up to 125 Msps. Pipelined architecture and output error correction ensure the ADC1412D is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a single 3 V source, it can handle output logic levels from 1.8 V to 3.3 V in CMOS mode, thanks to a separate digital output supply. It supports the LVDS (Low Voltage D | ADC1412D125HN-C1 |
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ADC1410S065F2-DB
Renesas Electronics
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1 | IDTs ADC1410S065F2 demoboard is suitable for dynamic performance evaluations from low to high IF configuration with LVDS DDR output variants. A data-acquisition board can be used during design and prototype to analyze ADC performance. | ADC1410S065F2-DB |
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ADC1412D105HN-C18
Renesas Electronics
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1 | The ADC1412D105HN is a dual channel 14-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power consumption at sample rates up to 105 Msps. Pipelined architecture and output error correction ensure the ADC1412D is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a single 3 V source, it can handle output logic levels from 1.8 V to 3.3 V in CMOS mode, thanks to a separate digital output supply. It supports the LVDS (Low Voltage D | ADC1412D105HN-C18 |
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ADC1415S125F2/DB
Nexperia
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ADC1453D250NGG-C1
Renesas Electronics
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1 | The ADC1453D250 is a dual channel 14-bit Analog-to-Digital Converter (ADC) with JESD204B serial outputs interface optimized for high dynamic performance and low power consumption at sample rates up to 250 Msps. Pipelined architecture and output error correction ensure the ADC1453D250 is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a single 1.8 V source, the ADC1453D complies to the JESD204B serial output standard. An integrated Serial Peripheral Interface (S | ADC1453D250NGG-C1 |
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