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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	71T75802S100BGGI8 Renesas Electronics	1	The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.	BGA	71T75802S100BGGI8	3D model available Symbol and footprint available 3	1 Download Model
	71T75802S133PFGI8 Renesas Electronics	1	The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.	Quad Flat Packages	71T75802S133PFGI8	3D model available Symbol and footprint available 3	1 Download Model
	1758021 Phoenix Contact	1	MSTBV 2,5/ 3-G-5,08 - PCB headers, nominal cross section: 2.5 mm², color: green, nominal current: 12 A, rated voltage (III/2): 320 V, contact surface: Sn, contact connection type: Pin, number of potentials: 3, number of rows: 1, number of positions: 3, number of connections: 3, product range: MSTBV 2,5/..-G, pitch: 5.08 mm, mounting: Wave soldering, pin layout: Linear pinning, solder pin [P]: 3.9 mm, number of solder pins per potential: 1, plug-in system: COMBICON MSTB 2,5, Pin connector pattern	Other	1758021	3D model available Symbol and footprint available 3	1 Download Model
	71T75802S150BGGI8 Renesas Electronics	1	The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.	BGA	71T75802S150BGGI8	3D model available Symbol and footprint available 3	1 Download Model

	71T75802S133BGG8 Renesas Electronics	1	The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.	BGA	71T75802S133BGG8	3D model available Symbol and footprint available 3	1 Download Model
	71T75802S166BG8 Renesas Electronics	1	The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.	BGA	71T75802S166BG8	3D model available Symbol and footprint available 3	1 Download Model
	GMR7580-21P1APN Glenair	1	Micro-D GMR7580 Vertical Mount Printed Circuit Board Connectors , 2 µ Maximum , 21 Positions , 3 ANP , 600 VAC , -55 °C to +150 °C	Other	GMR7580-21P1APN	3D model not available Symbol and footprint available 2	1 Download Model
	GMR7580-25S2BSU Glenair	1	Micro-D GMR7580 Vertical Mount Printed Circuit Board Connectors 25 Socket Position	Other	GMR7580-25S2BSU	3D model not available Symbol and footprint available 2	1 Download Model
	GMR7580-25S1BVU-428 Glenair	1	Micro-D GMR7580 Vertical Mount Printed Circuit Board Connectors D-Sub Micro-D Connectors 25S,1.91mm Pich	Other	GMR7580-25S1BVU-428	3D model available Symbol and footprint available 3	1 Download Model
	71T75802S166BGI Renesas Electronics	1	The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.	BGA	71T75802S166BGI	3D model available Symbol and footprint available 3	1 Download Model
	71T75802S150BG Renesas Electronics	1	The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.	BGA	71T75802S150BG	3D model available Symbol and footprint available 3	1 Download Model
	71T75802S200BG Renesas Electronics	1	The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.	BGA	71T75802S200BG	3D model available Symbol and footprint available 3	1 Download Model
	71T75802S133PFG8 Renesas Electronics	1	The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.	Quad Flat Packages	71T75802S133PFG8	3D model available Symbol and footprint available 3	1 Download Model
	71T75802S200PFG Renesas Electronics	1	The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.	Quad Flat Packages	71T75802S200PFG	3D model available Symbol and footprint available 3	1 Download Model
	71T75802S150BGI Renesas Electronics	1	The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.	BGA	71T75802S150BGI	3D model available Symbol and footprint available 3	1 Download Model

	71T75802S133PFG Renesas Electronics	1	The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.	Quad Flat Packages	71T75802S133PFG	3D model available Symbol and footprint available 3	1 Download Model
	71T75802S166PFG Renesas Electronics	1	The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.	Quad Flat Packages	71T75802S166PFG	3D model not available Symbol and footprint available 2	1 Download Model
	71T75802S166BGGI Renesas Electronics	1	The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.	BGA	71T75802S166BGGI	3D model available Symbol and footprint available 3	1 Download Model
	71T75802S100BGI Renesas Electronics	1	The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.	BGA	71T75802S100BGI	3D model available Symbol and footprint available 3	1 Download Model
	71T75802S100BG Renesas Electronics	1	The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.	BGA	71T75802S100BG	3D model available Symbol and footprint available 3	1 Download Model
	71T75802S166PFG8 Renesas Electronics	1	The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.	Quad Flat Packages	71T75802S166PFG8	3D model available Symbol and footprint available 3	1 Download Model
	71T75802S150BG8 Renesas Electronics	1	The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.	BGA	71T75802S150BG8	3D model available Symbol and footprint available 3	1 Download Model
	71T75802S166BGGI8 Renesas Electronics	1	The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.	BGA	71T75802S166BGGI8	3D model available Symbol and footprint available 3	1 Download Model
	71T75802S150BGGI Renesas Electronics	1	The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.	BGA	71T75802S150BGGI	3D model available Symbol and footprint available 3	1 Download Model
	71T75802S200BG8 Renesas Electronics	1	The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.	BGA	71T75802S200BG8	3D model available Symbol and footprint available 3	1 Download Model
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