W631G Footprint, Symbol and 3D Model search results

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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	W631GU6MB09K Winbond	1	Power Supply: 1.35V (typ.), VDD, VDDQ = 1.283V to 1.45V\r\n Backward compatible to VDD, VDDQ = 1.5V ± 0.075V\r\n Double Data Rate architecture: two data transfers per clock cycle\r\n Eight internal banks for concurrent operation\r\n 8 bit prefetch architecture\r\n CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13 and 14\r\n Burst length 8 (BL8) and burst chop 4 (BC4) modes: fixed via mode register (MRS) or selectable OnThe-Fly (OTF)\r\n Programmable read burst ordering: interleaved or nibble sequential\r\n Bi-directional, dif	BGA	W631GU6MB09K	3D model available Symbol and footprint available 3	1 Download Model
	W631GU8MB09S Winbond	1	SDRAM - DDR3L Memory IC 1Gbit Parallel 800 MHz 20 ns 78-VFBGA (10.5x8)	BGA	W631GU8MB09S	3D model available Symbol and footprint available 3	1 Download Model
	W631GU8MB11A Winbond	1	SDRAM - DDR3L Memory IC 1Gbit Parallel 800 MHz 20 ns 78-VFBGA (10.5x8)	BGA	W631GU8MB11A	3D model available Symbol and footprint available 3	1 Download Model
	W631GG6MB15A Winbond	1	 Power Supply: VDD, VDDQ = 1.5V ± 0.075V\r\n Double Data Rate architecture: two data transfers per clock cycle\r\n Eight internal banks for concurrent operation\r\n 8 bit prefetch architecture\r\n CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13 and 14\r\n Burst length 8 (BL8) and burst chop 4 (BC4) modes: fixed via mode register (MRS) or selectable OnThe-Fly (OTF)\r\n Programmable read burst ordering: interleaved or nibble sequential\r\n Bi-directional, differential data strobes (DQS and DQS#) are transmitted / received w	BGA	W631GG6MB15A	3D model available Symbol and footprint available 3	1 Download Model

	W631GG6MB09A Winbond	1	Power Supply: VDD, VDDQ = 1.5V ± 0.075V\r\n Double Data Rate architecture: two data transfers per clock cycle\r\n Eight internal banks for concurrent operation\r\n 8 bit prefetch architecture\r\n CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13 and 14\r\n Burst length 8 (BL8) and burst chop 4 (BC4) modes: fixed via mode register (MRS) or selectable OnThe-Fly (OTF)\r\n Programmable read burst ordering: interleaved or nibble sequential\r\n Bi-directional, differential data strobes (DQS and DQS#) are transmitted / received wit	BGA	W631GG6MB09A	3D model available Symbol and footprint available 3	1 Download Model
	W631GU8NB09A Winbond	1	DDR3 SDRAM 2133MHz	BGA	W631GU8NB09A	3D model available Symbol and footprint available 3	1 Download Model
	W631GG8NB15K Winbond	1	Power Supply: VDD, VDDQ = 1.5V ± 0.075V\r\n Double Data Rate architecture: two data transfers per clock cycle\r\n Eight internal banks for concurrent operation\r\n 8 bit prefetch architecture\r\n CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13 and 14\r\n Burst length 8 (BL8) and burst chop 4 (BC4) modes: fixed via mode register (MRS) or selectable OnThe-Fly (OTF)\r\n Programmable read burst ordering: interleaved or nibble sequential\r\n Bi-directional, differential data strobes (DQS and DQS#) are transmitted / received wit	BGA	W631GG8NB15K	3D model available Symbol and footprint available 3	1 Download Model
	W631GG8MB09K Winbond	1	 Power Supply: VDD, VDDQ = 1.5V ± 0.075V\r\n Double Data Rate architecture: two data transfers per clock cycle\r\n Eight internal banks for concurrent operation\r\n 8 bit prefetch architecture\r\n CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13 and 14\r\n Burst length 8 (BL8) and burst chop 4 (BC4) modes: fixed via mode register (MRS) or selectable OnThe-Fly (OTF)\r\n Programmable read burst ordering: interleaved or nibble sequential\r\n Bi-directional, differential data strobes (DQS and DQS#) are transmitted / received w	BGA	W631GG8MB09K	3D model available Symbol and footprint available 3	1 Download Model
	W631GG8MB12K Winbond	1	Power Supply: VDD, VDDQ = 1.5V ± 0.075V\r\n Double Data Rate architecture: two data transfers per clock cycle\r\n Eight internal banks for concurrent operation\r\n 8 bit prefetch architecture\r\n CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13 and 14\r\n Burst length 8 (BL8) and burst chop 4 (BC4) modes: fixed via mode register (MRS) or selectable OnThe-Fly (OTF)\r\n Programmable read burst ordering: interleaved or nibble sequential\r\n Bi-directional, differential data strobes (DQS and DQS#) are transmitted / received wit	BGA	W631GG8MB12K	3D model available Symbol and footprint available 3	1 Download Model
	W631GU8NB11S Winbond	1	DDR3 SDRAM 1866MHz	BGA	W631GU8NB11S	3D model available Symbol and footprint available 3	1 Download Model
	W631GU6RB11J Winbond	1	1Gb DDR3 SDRAM 1866MHz VFBGA96	BGA	W631GU6RB11J	3D model available Symbol and footprint available 3	1 Download Model
	W631GU6RB-12 Winbond	1	1Gb DDR3 SDRAM 1600MHz VFBGA96	BGA	W631GU6RB-12	3D model available Symbol and footprint available 3	1 Download Model
	W631GG8NB15S Winbond	1	 Power Supply: VDD, VDDQ = 1.5V ± 0.075V\r\n Double Data Rate architecture: two data transfers per clock cycle\r\n Eight internal banks for concurrent operation\r\n 8 bit prefetch architecture\r\n CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13 and 14\r\n Burst length 8 (BL8) and burst chop 4 (BC4) modes: fixed via mode register (MRS) or selectable OnThe-Fly (OTF)\r\n Programmable read burst ordering: interleaved or nibble sequential\r\n Bi-directional, differential data strobes (DQS and DQS#) are transmitted / received w	BGA	W631GG8NB15S	3D model available Symbol and footprint available 3	1 Download Model
	W631GU6NB15K Winbond	1	1Gb DDR3 SDRAM 1333MHz VFBGA96	BGA	W631GU6NB15K	3D model available Symbol and footprint available 3	1 Download Model
	W631GU8RB11K Winbond	1	1Gb DDR3 SDRAM 1866MHz VFBGA96	BGA	W631GU8RB11K	3D model available Symbol and footprint available 3	1 Download Model

	W631GG8NB09S Winbond	1	 Power Supply: VDD, VDDQ = 1.5V ± 0.075V\r\n Double Data Rate architecture: two data transfers per clock cycle\r\n Eight internal banks for concurrent operation\r\n 8 bit prefetch architecture\r\n CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13 and 14\r\n Burst length 8 (BL8) and burst chop 4 (BC4) modes: fixed via mode register (MRS) or selectable OnThe-Fly (OTF)\r\n Programmable read burst ordering: interleaved or nibble sequential\r\n Bi-directional, differential data strobes (DQS and DQS#) are transmitted / received w	BGA	W631GG8NB09S	3D model available Symbol and footprint available 3	1 Download Model
	W631GG8MB11K Winbond	1	1Gb DDR3 SDRAM 1866MHz VFBGA78	BGA	W631GG8MB11K	3D model available Symbol and footprint available 3	1 Download Model
	W631GU6RB09J Winbond	1	1Gb DDR3 SDRAM 2133MHz VFBGA96	BGA	W631GU6RB09J	3D model available Symbol and footprint available 3	1 Download Model
	W631GU8MB15S Winbond	1	DDR3 SDRAM 1333MHz	BGA	W631GU8MB15S	3D model available Symbol and footprint available 3	1 Download Model
	W631GG8MB11S Winbond	1	Power Supply: VDD, VDDQ = 1.5V ± 0.075V\r\n Double Data Rate architecture: two data transfers per clock cycle\r\n Eight internal banks for concurrent operation\r\n 8 bit prefetch architecture\r\n CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13 and 14\r\n Burst length 8 (BL8) and burst chop 4 (BC4) modes: fixed via mode register (MRS) or selectable OnThe-Fly (OTF)\r\n Programmable read burst ordering: interleaved or nibble sequential\r\n Bi-directional, differential data strobes (DQS and DQS#) are transmitted / received wit	BGA	W631GG8MB11S	3D model available Symbol and footprint available 3	1 Download Model
	W631GU6MB11A Winbond	1	 Power Supply: 1.35V (typ.), VDD, VDDQ = 1.283V to 1.45V\r\n Backward compatible to VDD, VDDQ = 1.5V ± 0.075V\r\n Double Data Rate architecture: two data transfers per clock cycle\r\n Eight internal banks for concurrent operation\r\n 8 bit prefetch architecture\r\n CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13 and 14\r\n Burst length 8 (BL8) and burst chop 4 (BC4) modes: fixed via mode register (MRS) or selectable OnThe-Fly (OTF)\r\n Programmable read burst ordering: interleaved or nibble sequential\r\n Bi-directional, d	BGA	W631GU6MB11A	3D model available Symbol and footprint available 3	1 Download Model
	W631GU8NB09K Winbond	1	DDR3 SDRAM 2133MHz	BGA	W631GU8NB09K	3D model available Symbol and footprint available 3	1 Download Model
	W631GG6NB09S Winbond	1	⚫ Power Supply: VDD, VDDQ = 1.5V ± 0.075V\r\n⚫ Double Data Rate architecture: two data transfers per clock cycle\r\n⚫ Eight internal banks for concurrent operation\r\n⚫ 8 bit prefetch architecture\r\n⚫ CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13 and 14\r\n⚫ Burst length 8 (BL8) and burst chop 4 (BC4) modes: fixed via mode register (MRS) or selectable OnThe-Fly (OTF)\r\n⚫ Programmable read burst ordering: interleaved or nibble sequential\r\n⚫ Bi-directional, differential data strobes (DQS and DQS#) are transmitted / received w	BGA	W631GG6NB09S	3D model available Symbol and footprint available 3	1 Download Model
	W631GU8RB09K Winbond	1	1Gb DDR3 SDRAM 2133MHz VFBGA96	BGA	W631GU8RB09K	3D model available Symbol and footprint available 3	1 Download Model
	W631GU6NB15A Winbond	1	1Gb DDR3 SDRAM 1333MHz VFBGA96	BGA	W631GU6NB15A	3D model available Symbol and footprint available 3	1 Download Model
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