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EEE-1EA471UAP
Panasonic
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1 | PANASONIC - EEE-1EA471UAP - SMD Aluminum Electrolytic Capacitor, Radial Can - SMD, 470 µF, 25 V, S Series, 2000 hours @ 85°C | Other | EEE-1EA471UAP |
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EEE0JA470WR
Panasonic
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1 | PANASONIC - EEE0JA470WR - SMD Aluminium Electrolytic Capacitor, Radial Can - SMD, 47 µF, 6.3 V, S Series, 1000 hours @ 85°C | Other | EEE0JA470WR |
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C0805N680F1GSL7189
KEMET
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1 | SMD Mil PRF55681, Ceramic, 68 pF, 1%, 100 VDC, 125°C, -55°C, BP, S (0.001%/1000 Hrs), 0805, 2mm, 1.25mm, 1.3mm, 0.5mm, 2500, 78 Weeks, 130 | Capacitor Chip Non-polarised | C0805N680F1GSL7189 |
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EEE1EA221P
Panasonic
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1 | PANASONIC - EEE1EA221P - SMD Aluminium Electrolytic Capacitor, Radial Can - SMD, 220 µF, 25 V, S Series, 2000 hours @ 85°C | Other | EEE1EA221P |
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MFR-25SFTF523K4
YAGEO
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1 | METAL General RoHS compliant Pro d uct sp ecification – S ept e m b er 28, 2 021 V.1 A SHEET FILM RESISTORS General Purpose MFR Series ±0.5%, ±1%, ±2%, ±5% 1/6W to 3W RoHS compliant & Halogen Free | Resistors, Axial Diameter Horizontal Mounting | MFR-25SFTF523K4 |
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1410-L210-L2F1-S02-5A
E-T-A
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1 | Circuit Breakers Single pole press-to-reset thermal circuit breaker with extremely fast overload switching performance (R-type TO CBE to EN 60934), PCB mounting. Miniaturised construction minimises PCB real estate required. Type 1410-L2 features changeover contacts s | Other | 1410-L210-L2F1-S02-5A |
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MAX149BMAP/PR3+
Analog Devices
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1 | S 8-Channel Single-Ended or 4-Channel Differential\r\nInputs\r\nS Single-Supply Operation: +2.7V to +5.25V\r\nS Internal 2.5V Reference (MAX149)\r\nS Low Power: 1.2mA (133ksps, 3V Supply)\r\n 54µA (1ksps, 3V Supply)\r\n 1µA (Power-Down Mode)\r\nS SPI/QSPI/MICROWIRE/TMS320-Compatible 4-Wire\r\nSerial Interface\r\nS Software-Configurable Unipolar or Bipolar Inputs\r\n20 SSOP | Small Outline Packages | MAX149BMAP/PR3+ |
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STB1001H-7.62-20
Summit Electronics
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1 | STB1001H-7.62-XX s a Terminal Block Horizontal header family with a 7.62 mm pitch.The connector is available from 2 up to 24 poles an and optional with a vertical orientation | Header, Shrouded - Right Angle PTH Box | STB1001H-7.62-20 |
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STB1001H-7.62-23
Summit Electronics
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1 | STB1001H-7.62-XX s a Terminal Block Horizontal header family with a 7.62 mm pitch.The connector is available from 2 up to 24 poles an and optional with a vertical orientation | Header, Shrouded - Right Angle PTH Box | STB1001H-7.62-23 |
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SM160N
SECURA
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1 | Batch process design, excellent power dissipation offers\r\nBetter reverse leakage current and thermal resistance.\r\n Low profile surface mounted application in order to\r\noptimize board space.\r\n Low power loss, high efficiency.\r\n High current capability, low forward voltage drop.\r\n High surge capability.\r\n Guardring for overvoltage protection.\r\n Very tiny plastic SMD package.\r\n Ultra high-speed switching.\r\n Silicon epitaxial planar chip, metal silicon junction.\r\n Lead-free parts meet environmental s | Small Outline Diode Flat Lead | SM160N |
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PA107DP
Apex Microtechnology
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1 | The PA107 is a high-voltage, high-speed power operational amplifier that is capable of slew rates up to 3,000 V/µs, which raises the bar for single-packaged hybrids. The PA107 also improves output current performance with 1.5 A (5 A PEAK), a high gain bandwidth of 180 MHz, and can operate on single supply voltages up to 200 V. The PA107 is an attractive option for driving piezos used in medical imaging and ultrasound applications, as well as programmable power supplies for the ATE market because the high s | Other | PA107DP |
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72831L25TFI8
Renesas Electronics
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1 | The 72831 is a 2K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72231 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72831 architecture lends itself to many flexible configurations s | Quad Flat Packages | 72831L25TFI8 |
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CRGS1206J10K
TE Connectivity
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1 | Configuration Features: Number of Resistors 1 | Dimensions: Product Width 1.55 MM | Product Length 3.1 MM | Product Width .061 INCH | Product Length .122 INCH | Product Height .022 INCH | Product Height .55 MM | Electrical Characteristics: Resistance Class 1kΩ – 1MΩ | Operating Voltage 200 V | Resistance Value 10K OHM | Passive Component Tolerance 5 PCT | Power Rating .6 WATT | Packaging Features: Packaging Method Taped & Reeled | Product Type Features: Resistor Type General Purpose Resistor | Package S | Resistor Chip | CRGS1206J10K |
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CRGCQ1206F1K0
TE Connectivity
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1 | Configuration Features: Number of Resistors 1 | Dimensions: Product Length 3.1 MM | Product Height .022 INCH | Product Length .122 INCH | Product Width 1.55 MM | Product Height .55 MM | Product Width .061 INCH | Electrical Characteristics: Power Rating .25 WATT | Resistance Class 1kΩ – 1MΩ | Resistance Value 1K OHM | Passive Component Tolerance 1 PCT | Operating Voltage 200 V | Packaging Features: Packaging Method Taped & Reeled | Product Type Features: Resistor Type General Purpose Resistor | Package S | Resistor Chip | CRGCQ1206F1K0 |
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CRG0805F12K
TE Connectivity
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1 | Configuration Features: Number of Resistors 1 | Dimensions: Product Length .079 INCH | Product Height .022 INCH | Product Height .55 MM | Product Width .049 INCH | Product Width 1.25 MM | Product Length 2 MM | Electrical Characteristics: Power Rating .125 WATT | Resistance Value 12K OHM | Resistance Class 1kΩ – 1MΩ | Operating Voltage 150 V | Passive Component Tolerance 1 PCT | Packaging Features: Packaging Method Taped & Reeled | Product Type Features: Resistor Type General Purpose Resistor | Package S | Resistor Chip | CRG0805F12K |
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72851L15TFI8
Renesas Electronics
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1 | The 72851 is a 8K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72251 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72851 architecture lends itself to many flexible configurations s | Quad Flat Packages | 72851L15TFI8 |
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72821L15PFI
Renesas Electronics
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1 | The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s | Quad Flat Packages | 72821L15PFI |
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292130-3
TE Connectivity
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1 | Body Features: Primary Product Color Natural | Configuration Features: Number of Positions 3 | Number of Rows 1 | PCB Mount Orientation Right Angle | Contact Features: Contact Mating Area Plating Material Thickness 39.37 MICIN | Contact Mating Area Length 4.2 MM | PCB Contact Termination Area Plating Material Thickness 1 MICM | Contact Mating Area Plating Material Tin | Contact Base Material Brass | Contact Layout Inline | Contact Mating Area Length .165 INCH | Contact Current Rating (Max) 4 AMP | Contact S | Other | 292130-3 |
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72821L25TF8
Renesas Electronics
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1 | The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s | Quad Flat Packages | 72821L25TF8 |
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72841L15TF8
Renesas Electronics
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1 | The 72841 is a 4K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72241 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72841 architecture lends itself to many flexible configurations s | Quad Flat Packages | 72841L15TF8 |
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ADR4540CRZ
Analog Devices
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1 | ► Maximum temperature coefficient (TCVOUT):\r\n► 0.8 ppm/°C (D grade 0°C to 70°C)\r\n► 1 ppm/°C (C grade 0°C to 70°C)\r\n► 2 ppm/°C (B grade −40°C to +125°C)\r\n► 4 ppm/°C (A grade −40°C to +125°C)\r\n► Output noise (0.1 Hz to 10 Hz):\r\n► 1 μV p-p at VOUT of 2.048 V typical\r\n► Initial output voltage error:\r\n► B, C, D grade: ±0.02% (maximum)\r\n► Input voltage range: 3 V to 15 V\r\n► Operating temperature:\r\n► A grade and B grade: −40°C to +125°C\r\n► C grade and D grade: 0°C to +70°C\r\n► Output current: +10 mA source/−10 mA s | Small Outline Packages | ADR4540CRZ |
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ADR4530BRZ
Analog Devices
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1 | ► Maximum temperature coefficient (TCVOUT):\r\n► 0.8 ppm/°C (D grade 0°C to 70°C)\r\n► 1 ppm/°C (C grade 0°C to 70°C)\r\n► 2 ppm/°C (B grade −40°C to +125°C)\r\n► 4 ppm/°C (A grade −40°C to +125°C)\r\n► Output noise (0.1 Hz to 10 Hz):\r\n► 1 μV p-p at VOUT of 2.048 V typical\r\n► Initial output voltage error:\r\n► B, C, D grade: ±0.02% (maximum)\r\n► Input voltage range: 3 V to 15 V\r\n► Operating temperature:\r\n► A grade and B grade: −40°C to +125°C\r\n► C grade and D grade: 0°C to +70°C\r\n► Output current: +10 mA source/−10 mA s | Small Outline Packages | ADR4530BRZ |
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72851L10TF8
Renesas Electronics
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1 | The 72851 is a 8K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72251 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72851 architecture lends itself to many flexible configurations s | Quad Flat Packages | 72851L10TF8 |
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GT PSLR31.13-LUMQ-T1T2-1
ams OSRAM
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1 | High Power LEDs - Single Color True Green DURIS S 5 | Other | GT PSLR31.13-LUMQ-T1T2-1 |
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7447789222
Würth Elektronik
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1 | Wurth WE-PD S Series Shielded Wire-wound SMD Inductor 220 μH ±20% 430mA Idc | Other | 7447789222 |
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