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71V256SA15YGI
Renesas Electronics
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1 | The 71V256SA 3.3V CMOS Asynchronous SRAM is organized as 32K x 8. When in standby mode, its very low power characteristics contribute to extended battery life. Under full standby mode (CS at CMOS level, f=0), power consumption is guaranteed to be less than 6.6mW. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. | Other | 71V256SA15YGI |
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71V256SA20PZGI
Renesas Electronics
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1 | The 71V256SA 3.3V CMOS Asynchronous SRAM is organized as 32K x 8. When in standby mode, its very low power characteristics contribute to extended battery life. Under full standby mode (CS at CMOS level, f=0), power consumption is guaranteed to be less than 6.6mW. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. | Other | 71V256SA20PZGI |
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71V25761S166BGI
Renesas Electronics
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1 | The 71V25761 3.3V CMOS Synchronous SRAM is organized as 128K x 36 and contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as the 71V25761 can provide four cycles of data for a single address presented to the SRAM. | BGA | 71V25761S166BGI |
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71V25761S183BGI8
Renesas Electronics
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1 | The 71V25761 3.3V CMOS Synchronous SRAM is organized as 128K x 36 and contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as the 71V25761 can provide four cycles of data for a single address presented to the SRAM. | BGA | 71V25761S183BGI8 |
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71V256SA12YG8
Renesas Electronics
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1 | The 71V256SA 3.3V CMOS Asynchronous SRAM is organized as 32K x 8. When in standby mode, its very low power characteristics contribute to extended battery life. Under full standby mode (CS at CMOS level, f=0), power consumption is guaranteed to be less than 6.6mW. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. | Other | 71V256SA12YG8 |
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71V25761S183BGI
Renesas Electronics
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1 | The 71V25761 3.3V CMOS Synchronous SRAM is organized as 128K x 36 and contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as the 71V25761 can provide four cycles of data for a single address presented to the SRAM. | BGA | 71V25761S183BGI |
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71V25761S166BG
Renesas Electronics
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1 | The 71V25761 3.3V CMOS Synchronous SRAM is organized as 128K x 36 and contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as the 71V25761 can provide four cycles of data for a single address presented to the SRAM. | BGA | 71V25761S166BG |
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71V256SA12YG
Renesas Electronics
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1 | The 71V256SA 3.3V CMOS Asynchronous SRAM is organized as 32K x 8. When in standby mode, its very low power characteristics contribute to extended battery life. Under full standby mode (CS at CMOS level, f=0), power consumption is guaranteed to be less than 6.6mW. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. | Other | 71V256SA12YG |
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71V256SA20PZG8
Renesas Electronics
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1 | The 71V256SA 3.3V CMOS Asynchronous SRAM is organized as 32K x 8. When in standby mode, its very low power characteristics contribute to extended battery life. Under full standby mode (CS at CMOS level, f=0), power consumption is guaranteed to be less than 6.6mW. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. | Other | 71V256SA20PZG8 |
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71V256SA15PZGI8
Renesas Electronics
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1 | The 71V256SA 3.3V CMOS Asynchronous SRAM is organized as 32K x 8. When in standby mode, its very low power characteristics contribute to extended battery life. Under full standby mode (CS at CMOS level, f=0), power consumption is guaranteed to be less than 6.6mW. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. | Other | 71V256SA15PZGI8 |
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71V256SA10PZG8
Renesas Electronics
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1 | The 71V256SA 3.3V CMOS Asynchronous SRAM is organized as 32K x 8. When in standby mode, its very low power characteristics contribute to extended battery life. Under full standby mode (CS at CMOS level, f=0), power consumption is guaranteed to be less than 6.6mW. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. | Small Outline Packages | 71V256SA10PZG8 |
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71V256SA15YG
Renesas Electronics
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1 | The 71V256SA 3.3V CMOS Asynchronous SRAM is organized as 32K x 8. When in standby mode, its very low power characteristics contribute to extended battery life. Under full standby mode (CS at CMOS level, f=0), power consumption is guaranteed to be less than 6.6mW. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. | Other | 71V256SA15YG |
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71V256SA12PZGI8
Renesas Electronics
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1 | The 71V256SA 3.3V CMOS Asynchronous SRAM is organized as 32K x 8. When in standby mode, its very low power characteristics contribute to extended battery life. Under full standby mode (CS at CMOS level, f=0), power consumption is guaranteed to be less than 6.6mW. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. | Other | 71V256SA12PZGI8 |
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71V256SA12PZGI
Renesas Electronics
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1 | The 71V256SA 3.3V CMOS Asynchronous SRAM is organized as 32K x 8. When in standby mode, its very low power characteristics contribute to extended battery life. Under full standby mode (CS at CMOS level, f=0), power consumption is guaranteed to be less than 6.6mW. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. | Other | 71V256SA12PZGI |
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71V25761S166BGI8
Renesas Electronics
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1 | The 71V25761 3.3V CMOS Synchronous SRAM is organized as 128K x 36 and contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as the 71V25761 can provide four cycles of data for a single address presented to the SRAM. | BGA | 71V25761S166BGI8 |
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71V256SA12YGI8
Renesas Electronics
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1 | The 71V256SA 3.3V CMOS Asynchronous SRAM is organized as 32K x 8. When in standby mode, its very low power characteristics contribute to extended battery life. Under full standby mode (CS at CMOS level, f=0), power consumption is guaranteed to be less than 6.6mW. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. | Other | 71V256SA12YGI8 |
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IDT71V25761YSA200BGI8
Renesas Electronics
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1 | Renesas Electronics | BGA | IDT71V25761YSA200BGI8 |
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71V2556XS200BQG
Integrated Device Technology Inc
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1 | ZBT SRAM, 128KX36, 3.2ns, CMOS, PBGA165 | 71V2556XS200BQG |
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71V2577S75BQI
Integrated Device Technology Inc
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1 | Cache SRAM | 71V2577S75BQI |
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71V2558XS166BQGI
Integrated Device Technology Inc
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1 | ZBT SRAM, 256KX18, 3.5ns, CMOS, PBGA165 | 71V2558XS166BQGI |
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71V25761YSA183BQ8
Integrated Device Technology Inc
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1 | Standard SRAM, 128KX36, 3.3ns, CMOS, PBGA165 | 71V25761YSA183BQ8 |
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71V2578S183PF
Integrated Device Technology Inc
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1 | Standard SRAM, 256KX18, 3.3ns, CMOS, PQFP100 | 71V2578S183PF |
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71V2556SA133BQI8
Integrated Device Technology Inc
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1 | SRAM | 71V2556SA133BQI8 |
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71V25761YS183BQGI8
Integrated Device Technology Inc
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1 | Cache SRAM, 128KX36, 3.3ns, CMOS, PBGA165 | 71V25761YS183BQGI8 |
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71V2556XS150PF8
Integrated Device Technology Inc
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1 | ZBT SRAM | 71V2556XS150PF8 |
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