74LVC Model Download Search Results
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74LVC06AD,112
Nexperia
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1 | 74LVC06A - Hex inverter with open-drain outputs@en-us | Other | 74LVC06AD,112 |
3
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74LVC125AD-Q100J
Nexperia
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1 | 74LVC125A-Q100 - Quad buffer/line driver with 5 V tolerant input/outputs; 3-state@en-us | Other | 74LVC125AD-Q100J |
3
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74LVC574APW-Q100J
Nexperia
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1 | 74LVC574A_Q100 - Octal D-type flip-flop with 5 V tolerant inputs/outputs; positive edge-trigger; 3-state@en-us | Other | 74LVC574APW-Q100J |
2
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74LVC132AD,112
Nexperia
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1 | NXP 74LVC132AD,112, Quad 2-Input NAND Schmitt Trigger Logic Gate, 1.2 → 3.6 V, 14-Pin SOIC | Other | 74LVC132AD,112 |
3
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74LVCH16646APAG8
Renesas Electronics
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1 | The 74LVCH16646A high-speed, low power 16-bit bus transceiver and register is organized as two independent 8-bit D-type transceivers with 3- state D-type registers.Separate clock inputs are provided for A and B port registers. Flow-through organization of signal pins simplifies layout. All pins can be driven from either 3.3V or 5V devices allowing the use of this device as a translator in a mixed 3.3V/5V supply system. The 74LVCH16646A has "bus-hold" which prevents floating inputs and eliminates the need | Small Outline Packages | 74LVCH16646APAG8 |
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74LVC2G240DP,125
Nexperia
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1 | 74LVC2G240 - Dual inverting buffer/line driver; 3-state@en-us | Small Outline Packages | 74LVC2G240DP,125 |
3
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74LVC16245ADGG
Nexperia
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1 | 74LVC16245ADGG, Dual Bus Transceiver 74LVC, 16-Bit Non-Inverting 1.65 → 3.6 V 48-Pin TSSOP | Small Outline Packages | 74LVC16245ADGG |
3
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74LVC1G125GW
Nexperia
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1 | Bus buffer/line driver 3-state | SOT23 (5-Pin) | 74LVC1G125GW |
3
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74LVCR162245APAG8
Renesas Electronics
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1 | The 74LVCR162245A is a high-speed, low power 16-bit bus transceiver that is ideal for asynchronous communication between two busses. The Direction and Output Enable controls are designed to operate this device as either two independent 8-bit transceivers or one 16-bit transceiver. All pins can be driven from either 3.3V or 5V devices allowing the use of this device as a translator in a mixed 3.3V/5V supply system. The LVCR162245A has series resistors in the device output structure which will significantly r | Small Outline Packages | 74LVCR162245APAG8 |
3
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74LVC1GU04GW-Q100H
Nexperia
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1 | 74LVC1GU04-Q100 - Unbuffered inverter@en-us | SOT23 (5-Pin) | 74LVC1GU04GW-Q100H |
3
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74LVC139PW,112
Nexperia
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1 | 74LVC139 - Dual 2-to-4 line decoder/demultiplexer@en-us | Small Outline Packages | 74LVC139PW,112 |
3
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74LVC126APW-Q100J
Nexperia
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1 | 74LVC126A-Q100 - Quad buffer/line driver with 5 V tolerant input/outputs; 3-state@en-us | Small Outline Packages | 74LVC126APW-Q100J |
3
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74LVC3G14GF,115
Nexperia
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1 | 74LVC3G14 - Triple inverting Schmitt trigger with 5 V tolerant input@en-us | Other | 74LVC3G14GF,115 |
3
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74LVCH16245APVG
Renesas Electronics
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1 | The 74LVCH16245A 16-bit high-speed, low power bus transceiver is ideal for asynchronous communication between two busses. This device can operate as either two independent 8-bit transceivers or one 16-bit transceiver. All pins can be driven from either 3.3V or 5V devices which allows the use of this device as a translator in a mixed 3.3V/5V supply system. The 74LVCH16245A has "bus-hold" which prevents floating inputs and eliminates the need for pull-up/down resistors. The 74LVCH16245A operates at -40C to +8 | Small Outline Packages | 74LVCH16245APVG |
3
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74LVC3G14DP,125
Nexperia
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1 | 74LVC3G14 - Triple inverting Schmitt trigger with 5 V tolerant input@en-us | Small Outline Packages | 74LVC3G14DP,125 |
3
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74LVC1G02GV,125
Nexperia
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1 | 74LVC1G02 - Single 2-input NOR gate@en-us | SOT23 (5-Pin) | 74LVC1G02GV,125 |
3
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74LVCE1G126W5-7
Diodes Incorporated
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1 | SINGLE BUFFER GATE WITH 3-STATE OUTPUT | SOT23 (5-Pin) | 74LVCE1G126W5-7 |
3
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74LVC2T45GN,115
Nexperia
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1 | 74LVC2T45; 74LVCH2T45 - Dual supply translating transceiver; 3-state@en-us | Other | 74LVC2T45GN,115 |
3
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74LVC16245APAG
Renesas Electronics
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1 | The 74LVC16245A 16-bit high-speed, low power bus transceiver is ideal for asynchronous communication between two busses and can operate as either two independent 8-bit transceivers or one 16-bit transceiver. All pins of the 74LVC16245A can be driven from either 3.3V or 5V devices which allows the use of this device as a translator in a mixed 3.3V/5V supply system. The 74LVC16245A operates at -40C to +85C | Small Outline Packages | 74LVC16245APAG |
3
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74LVCH16373ADGG-QJ
Nexperia
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1 | 74LVC16373A-Q100; 74LVCH16373A-Q100 - 16-bit D-type transparent latch with 5 V tolerant inputs/outputs; 3-state@en-us | Small Outline Packages | 74LVCH16373ADGG-QJ |
3
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74LVC2G34GV-Q100,1
Nexperia
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1 | 74LVC2G34-Q100 - Dual buffer gate@en-us | SOT23 (6-Pin) | 74LVC2G34GV-Q100,1 |
3
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74LVC244ADB,118
Nexperia
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1 | 74LVC(H)244A - Octal buffer/line driver; 3-state@en-us | Small Outline Packages | 74LVC244ADB,118 |
3
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74LVCH245AD,112
Nexperia
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1 | NXP 74LVCH245AD,112, 1 Bus Transceiver, Bus Transceiver, 8-Bit Non-Inverting LVTTL, 20-Pin SOIC | Small Outline Packages | 74LVCH245AD,112 |
3
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74LVC162245APVG
Renesas Electronics
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1 | The LVC162245A is designed for asynchronous communication between data buses and can be used as two 8-bit transceivers or one 16-bit transceiver. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated. All pins of the 74LVC162245A can be driven from either 3.3V or 5V devices which allows the use of this device as a translator in a mixed 3.3V/5V supply system. The 74LVC162245A operates at -40C to +85C | Small Outline Packages | 74LVC162245APVG |
3
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74LVC157ABQ-Q100X
Nexperia
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1 | 74LVC157A-Q100 - Quad 2-input multiplexer@en-us | Other | 74LVC157ABQ-Q100X |
3
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