Showing 25 of 8346 results
Filter by Manufacturer
| Image | Part Number | D.S | Description | Package Category | Prices / Stock | Model | Action |
|---|
| Image | Part Number | D.S | Description | Package Category | Prices / Stock | Model | Action | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
|
|
SN74ACT373NSR
Texas Instruments
|
1 | Octal D-Type Transparent Latches With 3-State Outputs | Small Outline Packages | SN74ACT373NSR |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
CY74FCT374TQCT
Texas Instruments
|
1 | Octal D-Type Registers with 3-State Outputs | Small Outline Packages | CY74FCT374TQCT |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
SN74AHCT373PW
Texas Instruments
|
1 | Octal Transparent D-Type Latches With 3-State Outputs | Small Outline Packages | SN74AHCT373PW |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
SN74HCT373PWR
Texas Instruments
|
1 | Octal Transparent D-Type Latches With 3-State Outputs | Small Outline Packages | SN74HCT373PWR |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
CY74FCT374ATPC
Texas Instruments
|
1 | Octal D-Type Registers with 3-State Outputs | Dual-In-Line Packages | CY74FCT374ATPC |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
SN74HCT374PWRE4
Texas Instruments
|
1 | Flip Flops Octal D-Ty Edge-Trig F-F W/3-State Otpt | Small Outline Packages | SN74HCT374PWRE4 |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
SN74HCT377DWG4
Texas Instruments
|
1 | Flip Flop D-Type Bus Interface Pos-Edge 1-Element 20-Pin SOIC Tube | Small Outline Packages | SN74HCT377DWG4 |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
SN74ACT373DW
Texas Instruments
|
1 | Texas Instruments SN74ACT373DW, Octal D Type Latch, Transparent, 3 State, 4.5 → 5.5 V, 20-Pin SOIC | Small Outline Packages | SN74ACT373DW |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
74AHCT374PW-Q100J
Nexperia
|
1 | 74AHC(T)374-Q100 - Octal D-type flip-flop; positive edge-trigger; 3-state@en-us | Small Outline Packages | 74AHCT374PW-Q100J |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
74FCT373ATSOG
Renesas Electronics
|
1 | The 74FCT373T is an octal transparent latch that has 3-state outputs and is intended for bus oriented applications. When Latch Enable (LE) is high, the flip-flops appear transparent to the data and when LE is low, the data that meets the set-up time is latched. The 74FCT373T operates at -40C to +85C. (For Mil version, see 54FCT373T) | Small Outline Packages | 74FCT373ATSOG |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
74HCT374DB,112
Nexperia
|
1 | 74HC(T)374 - Octal D-type flip-flop; positive edge-trigger; 3-state@en-us | Small Outline Packages | 74HCT374DB,112 |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
74FCT374CTSOG
Renesas Electronics
|
1 | The 74FCT374T is an 8-bit register that consists of eight D-type flip-flops with a buffered common clock and buffered 3-state output control. When the output enable (OE) input is low, the eight outputs are enabled. When the OE input is high, the outputs are in the high-impedance state. The 74FCT374T operates at -40C to +85C. (For Mil version, see 54FCT374T) | Small Outline Packages | 74FCT374CTSOG |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
74HCT373BQ-Q100,11
Nexperia
|
1 | 74HC(T)373-Q100 - Octal D-type transparent latch; 3-state@en-us | Other | 74HCT373BQ-Q100,11 |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
54FCT374ATDB
Renesas Electronics
|
1 | The 54FCT374T is an 8-bit register that consists of eight D-type flip-flops with a buffered common clock and buffered 3-state output control. When the output enable (OE) input is low, the eight outputs are enabled. When the OE input is high, the outputs are in the high-impedance state. The 54FCT374T operates at -55C to +125C. (For commercial version, see 74FCT374T) | Ceramic Dual-In-Line Packages | 54FCT374ATDB |
2
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
74FCT377CTSOG8
Renesas Electronics
|
1 | The 74FCT377T is an octal D flip-flop that has eight edge-triggered, D-type flip-flops with individual D inputs and O outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously when the Clock Enable (CE) is low. The register is fully edge-triggered. The 74FCT377T operates at -40C to +85C | Small Outline Packages | 74FCT377CTSOG8 |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
74FCT373CTSOG8
Renesas Electronics
|
1 | The 74FCT373T is an octal transparent latch that has 3-state outputs and is intended for bus oriented applications. When Latch Enable (LE) is high, the flip-flops appear transparent to the data and when LE is low, the data that meets the set-up time is latched. The 74FCT373T operates at -40C to +85C. (For Mil version, see 54FCT373T) | Small Outline Packages | 74FCT373CTSOG8 |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
MC74HCT374ADWR2G
onsemi
|
1 | Outputs Directly Interface to CMOS, NMOS, and TTL; Operating Voltage Range: 4.5 to 5.5 V; Low Input Current: 1.0 mA; Output Drive Capability: 15 LSTTL Loads; In Compliance with the Requirements Defined by JEDEC Standard No. 7A; Improvements over HCT374 - Improved Propagation Delays - 50% Lower Quiescent Power - Improved Input Noise and Latchup Immunity; TTL/NMOS-Compatible Input Levels; Chip Complexity: 276 FETs or 69 Equivalent Gates; Pb-Free Packages are Available* | Small Outline Packages | MC74HCT374ADWR2G |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
74AHCT377PW,118
Nexperia
|
1 | 74AHC(T)377 - Octal D-type flip-flop with data enable; positive-edge trigger@en-us | Small Outline Packages | 74AHCT377PW,118 |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
54FCT374CTDB
Renesas Electronics
|
1 | The 54FCT374T is an 8-bit register that consists of eight D-type flip-flops with a buffered common clock and buffered 3-state output control. When the output enable (OE) input is low, the eight outputs are enabled. When the OE input is high, the outputs are in the high-impedance state. The 54FCT374T operates at -55C to +125C. (For commercial version, see 74FCT374T) | Ceramic Dual-In-Line Packages | 54FCT374CTDB |
2
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
74FCT373CTPYG
Renesas Electronics
|
1 | The 74FCT373T is an octal transparent latch that has 3-state outputs and is intended for bus oriented applications. When Latch Enable (LE) is high, the flip-flops appear transparent to the data and when LE is low, the data that meets the set-up time is latched. The 74FCT373T operates at -40C to +85C. (For Mil version, see 54FCT373T) | Small Outline Packages | 74FCT373CTPYG |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
MC74ACT374DWG
onsemi
|
1 | See MC74AC377 for Clock Enable Version; 3-State Outputs for Bus-Oriented Applications; Buffered Positive Edge-Triggered Clock; ACT374 Has TTL Compatible Inputs; See MC74AC373 for Transparent Latch Version; See MC74AC574 for Broadside Pinout Version; See MC74AC564 for Broadside Pinout Version with Inverted Outputs; Outputs Source/Sink 24 mA; See MC74AC273 for Reset Version; Pb-Free Packages are Available | Small Outline Packages | MC74ACT374DWG |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
74FCT374ATSOG
Renesas Electronics
|
1 | The 74FCT374T is an 8-bit register that consists of eight D-type flip-flops with a buffered common clock and buffered 3-state output control. When the output enable (OE) input is low, the eight outputs are enabled. When the OE input is high, the outputs are in the high-impedance state. The 74FCT374T operates at -40C to +85C. (For Mil version, see 54FCT374T) | Small Outline Packages | 74FCT374ATSOG |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
74HCT377PW,112
Nexperia
|
1 | 74HC(T)377 - Octal D-type flip-flop with data enable; positive-edge trigger@en-us | Small Outline Packages | 74HCT377PW,112 |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
74HCT373DB,118
Nexperia
|
1 | 74HC(T)373 - Octal D-type transparent latch; 3-state@en-us | Small Outline Packages | 74HCT373DB,118 |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
74HCT377DB,118
Nexperia
|
1 | 74HC(T)377 - Octal D-type flip-flop with data enable; positive-edge trigger@en-us | Small Outline Packages | 74HCT377DB,118 |
3
|
Download Model | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||