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MC74HC86ADTR2G-Q
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1 | Chip Complexity: 56 FETs or 14 Equivalent Gates; Outputs Directly Interface to CMOS, NMOS, and TTL; Low Input Current: 1 mA; Operating Voltage Range: 2 to 6 V; High Noise Immunity Characteristic of CMOS Devices; In Compliance with the Requirements Defined by JEDEC Standard No. 7A; Output Drive Capability: 10 LSTTL Loads; Pb-Free Packages are Available | Small Outline Packages | MC74HC86ADTR2G-Q |
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MC74HC4316ADR2G
onsemi
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1 | Improved Linearity of ON Resistance; Chip Complexity: 66 FETs or 16.5 Equivalent Gates; Fast Switching and Propagation Speeds; Logic-Level Translator for On/Off Control and Enable Inputs; Analog Power-Supply Voltage Range (VCC - VEE) = 2.0 to 12.0 Volts; High ON/OFF Output Voltage Ratio; Diode Protection on All Inputs/Outputs; Digital (Control) Power-Supply Voltage Range (VCC - GND) = 2.0 to 6.0 Volts, Independent of VEE; Pb-Free Packages are Available* | Small Outline Packages | MC74HC4316ADR2G |
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MC74HC132ADR2G
onsemi
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1 | Operating Voltage Range: 2.0 to 6.0 V; Outputs Directly Interface to CMOS, NMOS, and TTL; High Noise Immunity Characteristic of CMOS Devices; In Compliance with the Requirements Defined by JEDEC Standard No. 7A; Low Input Current: 1.0 mA; Output Drive Capability: 10 LSTTL Loads; Chip Complexity: 72 FETs or 18 Equivalent Gates; Pb-Free Packages are Available* | Small Outline Packages | MC74HC132ADR2G |
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MC74HC05ADR2G
onsemi
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1 | Output Drive Capability: 10 LSTTL Loads with Suitable Pullup Resistor; Outputs Directly Interface to CMOS, NMOS and TTL; High Noise Immunity Characteristic of CMOS Devices; Operating Voltage Range: 2.0 to 6.0 V; Low Input Current: 1 µA; In Compliance With the JEDEC Standard No. 7A Requirements; Chip Complexity: 36 FETs or 9 Equivalent Gates; These are PbFree Devices | Small Outline Packages | MC74HC05ADR2G |
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MC74HC574ADWG
onsemi
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1 | Low Input Current: 1.0 mA; Operating Voltage Range: 2.0 to 6.0 V; Output Drive Capability: 15 LSTTL Loads; In Compliance with the Requirements Defined by JEDEC Standard No. 7A; Outputs Directly Interface to CMOS, NMOS and TTL; Chip Complexity: 266 FETs or 66.5 Equivalent Gates; Pb-Free Packages are Available | Small Outline Packages | MC74HC574ADWG |
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MC74HCT595ADTG
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1 | Output Drive Capability: 15 LSTTL Loads; Outputs Directly Interface to CMOS, NMOS, and TTL; Operating Voltage Range: 4.5 to 5.5 V; Low Input Current: 1.0 uA; High Noise Immunity Characteristic of CMOS Devices; In Compliance with the Requirements Defined by JEDEC Standard No. 7A; Chip Complexity: 328 FETs or 82 Equivalent Gates | Small Outline Packages | MC74HCT595ADTG |
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MC74HC139ADTR2G-Q
onsemi
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1 | Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 A High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC StandardNo. 7 A Chip Complexity: 100 FETs or 25 Equivalent Gates −Q Suffix for Automotive and Other Applications Requiring UniqueSite and Control Change Requirements; AEC−Q100 Qualified andPPAP Capable* These Devices are Pb−Fr | Small Outline Packages | MC74HC139ADTR2G-Q |
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MC74HCT4094ADR2G
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1 | Wide Operating Voltage Range: 4.5 to 5.5 V; Low Power Dissipation: ICC = < 10uA; In Compliance with the Requirements Defined by JEDEC Standard No. 7A; These are PbFree Devices | Small Outline Packages | MC74HCT4094ADR2G |
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MC74HC1G14DBVT1G
onsemi
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1 | High Noise Immunity; High Speed: tPD = 7ns (Typ) at VCC = 5V; Low Power Dissipation: ICC = 1mA (Max) at TA = 25°C; Balanced Propagation Delays (tpLH = tpHL); Symmetrical Output Impedance (IOH = IOL = 2mA); Chip Complexity: FET = 101 | SOT23 (5-Pin) | MC74HC1G14DBVT1G |
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MC74HC165ADTR2G-Q
onsemi
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1 | In Compliance with the Requirements Defined by JEDEC Standard No. 7A; Outputs Directly Interface to CMOS, NMOS, and TTL; Low Input Current: 1 mA; Chip Complexity: 286 FETs or 71.5 Equivalent Gates; Operating Voltage Range: 2 to 6 V; High Noise Immunity Characteristic of CMOS Devices; Output Drive Capability: 10 LSTTL Loads; Pb-Free Packages are Available* | Small Outline Packages | MC74HC165ADTR2G-Q |
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MC74HCT125ADR2G
onsemi
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1 | Output Drive Capability: 15 LSTTL Loads; Outputs Directly Interface to CMOS, NMOS, and TTL; Operating Voltage Range: 2.0 to 6.0 V; Low Input Current: 1.0 µA; High Noise Immunity Characteristic of CMOS Devices; In Compliance with the JEDEC Standard No. 7A Requirements; Chip Complexity: 72 FETs or 18 Equivalent Gates; These are PbFree Devices | Small Outline Packages | MC74HCT125ADR2G |
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MC74HC4040ADTR2
onsemi
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1 | IC COUNTER 12STAGE BIN 16-TSSOP | Small Outline Packages | MC74HC4040ADTR2 |
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MC74HC14AD
onsemi
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1 | Logic Circuit, HEX Inverter, HC-CMOS, 14 Pin, Plastic, SOP | Small Outline Packages | MC74HC14AD |
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MC74HCT14AN
onsemi
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1 | IC INVERT SCHMITT 6CH 1INP 14DIP | Dual-In-Line Packages | MC74HCT14AN |
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MC74HC273ADW
onsemi
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1 | D Flip-Flop, HC/UH Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20 | Small Outline Packages | MC74HC273ADW |
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MC74HC4060ANG
onsemi
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1 | ON Semiconductor MC74HC4060ANG 14-stage Binary Counter, Up Counter, , Uni-Directional, 16-Pin PDIP | Dual-In-Line Packages | MC74HC4060ANG |
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MC74HC245ADWG
onsemi
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1 | Operating Voltage Range: 2 to 6 V; Outputs Directly Interface to CMOS, NMOS, and TTL; Low Input Current: 1 mA; Output Drive Capability: 15 LSTTL Loads; High Noise Immunity Characteristic of CMOS Devices; In Compliance with the Requirements Defined by JEDEC Standard No. 7A; Chip Complexity: 308 FETs or 77 Equivalent Gates; Pb-Free Packages are Available | Small Outline Packages | MC74HC245ADWG |
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MC74HCT138ADG
onsemi
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1 | Obsolete - Dual 4-Input NAND Gate, TTL | Small Outline Packages | MC74HCT138ADG |
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MC74HC589ADTR2G
onsemi
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1 | Low Input Current: 1 mA; Operating Voltage Range: 2 to 6 V; High Noise Immunity Characteristic of CMOS Devices; Chip Complexity: 526 FETs or 131.5 Equivalent Gates; Output Drive Capability: 15 LSTTL Loads; In Compliance with the Requirements Defined by JEDEC Standard No. 7A; Outputs Directly Interface to CMOS, NMOS, and TTL; Pb-Free Packages are Available | Small Outline Packages | MC74HC589ADTR2G |
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MC74HC14ADTR2G
onsemi
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1 | Output Drive Capability: 10 LSTTL Loads; Operating Voltage Range: 2 to 6V; Outputs Directly Interface to CMOS, NMOS and TTL; Low Input Current: 1mA; In Compliance With the JEDEC Standard No. 7A Requirements; Chip Complexity: 60 FETs or 15 Equivalent Gates; High Noise Immunity Characteristic of CMOS Devices; Pb-Free Packages are Available | Small Outline Packages | MC74HC14ADTR2G |
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MC74HC1G14DFT1G
onsemi
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1 | High Noise Immunity; High Speed: tPD = 7ns (Typ) at VCC = 5V; Low Power Dissipation: ICC = 1mA (Max) at TA = 25°C; Balanced Propagation Delays (tpLH = tpHL); Symmetrical Output Impedance (IOH = IOL = 2mA); Chip Complexity: FET = 101 | SOT23 (5-Pin) | MC74HC1G14DFT1G |
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MC74HCT244ADTR2G-Q
onsemi
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1 | Output Drive Capability: 15 LSTTL Loads; TTL NMOS-Compatible Input Levels; Outputs Directly Interface to CMOS, NMOS, and TTL; Operating Voltage Range: 4.5 to 5.5 V; Low Input Current: 1 mA; In Compliance with the Requirements Defined by JEDEC Standard No. 7A; Chip Complexity: 112 FETs or 28 Equivalent Gates; Pb-Free Packages are Available | Small Outline Packages | MC74HCT244ADTR2G-Q |
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MC74HC86ADR2G
onsemi
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1 | Chip Complexity: 56 FETs or 14 Equivalent Gates; Outputs Directly Interface to CMOS, NMOS, and TTL; Low Input Current: 1 mA; Operating Voltage Range: 2 to 6 V; High Noise Immunity Characteristic of CMOS Devices; In Compliance with the Requirements Defined by JEDEC Standard No. 7A; Output Drive Capability: 10 LSTTL Loads; Pb-Free Packages are Available | Small Outline Packages | MC74HC86ADR2G |
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MC74HC08ADTR2G-Q
onsemi
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1 | Chip Complexity: 24 FETs or 6 Equivalent Gates; High Noise Immunity Characteristic of CMOS Devices; Low Input Current: 1mA; Outputs Directly Interface to CMOS, NMOS and TTL; Output Drive Capability: 10 LSTTL Loads; Operating Voltage Range: 2 to 6V; In Compliance With the JEDEC Standard No. 7A Requirements; Pb-Free Packages are Available* | Small Outline Packages | MC74HC08ADTR2G-Q |
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MC74HC14ADR2G-Q
onsemi
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1 | Output Drive Capability: 10 LSTTL Loads; Operating Voltage Range: 2 to 6V; Outputs Directly Interface to CMOS, NMOS and TTL; Low Input Current: 1mA; In Compliance With the JEDEC Standard No. 7A Requirements; Chip Complexity: 60 FETs or 15 Equivalent Gates; High Noise Immunity Characteristic of CMOS Devices; Pb-Free Packages are Available | Small Outline Packages | MC74HC14ADR2G-Q |
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