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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	MAX7044AKA+T Analog Devices	1	MAXIM INTEGRATED PRODUCTS - MAX7044AKA+T - IF Transmitter, 300MHz to 450MHz, ASK, OOK, 100Kbps, 12.5dBm, 2.1V to 3.6V, SOT-23-8	SOT23 (8-Pin)	MAX7044AKA+T	3D model available Symbol and footprint available 3	1 Download Model
	MAX2510EEI+T Analog Devices	1	RF Transceiver Low-Voltage IF Transceiver with Limiter RSSI and Quadrature Modulator	Small Outline Packages	MAX2510EEI+T	3D model available Symbol and footprint available 3	1 Download Model
	LTC5800IWR-IPMA#PBF Analog Devices	1	SmartMesh IP Wireless 802.15.4e System-on-Chip	Quad Flat No-Lead	LTC5800IWR-IPMA#PBF	3D model available Symbol and footprint available 3	1 Download Model
	F1456NKGK Renesas Electronics This part was updated within the past 30 days. Set alerts for model updates on the part download page.	1	The F1456 is a High-Gain/High-Linearity 2100MHz to 2950MHz TX Variable Gain Amplifier used in transmitter applications. The F1456 TX VGA provides 32.1dB maximum gain with +38dBm OIP3 and 3.9dB noise figure. Up to 31.5dB gain control is achieved using the combination of a digital step attenuator (DSA) plus KLIN™ RF variable gain amplifier gain adjustment. This device uses a single 5V supply and 215mA of ICC. This device is packaged in a 6 × 6 mm, 28-QFN with 50Ω single-ended RF input and RF output impedances	Quad Flat No-Lead	F1456NKGK	3D model available Symbol and footprint available 3	1 Download Model

	AD6674BCPZRL7-1000 Analog Devices	1	385 MHz BW IF Diversity Receiver	Quad Flat No-Lead	AD6674BCPZRL7-1000	3D model available Symbol and footprint available 3	1 Download Model
	SC2200A-00A00 Analog Devices	1	● Frequency Range: 698MHz–2700MHz\r\n● Integrated Preamp and Single-Ended RF I/Os\r\n● Single +1.8V Supply Voltage\r\n● External Reference Clock Support:\r\n• 10, 13, 15.36, 19.2, 20, 26, and 30.72MHz\r\n● Packaged in 11mm x 11mm SAWN QFN Package\r\n● Operating Case Temperature: -40°C to +100°C\r\n● RoHS, Green, REACH, and ISO9001 Compliant\r\n● Dual-Path RFIN/RFOUT Linearizer in CMOS SoC	Quad Flat No-Lead	SC2200A-00A00	3D model available Symbol and footprint available 3	1 Download Model
	RC32614A000GBB#HC0 Renesas Electronics This part was updated within the past 30 days. Set alerts for model updates on the part download page.	1	The RC32614A System Synchronizer for IEEE 1588 generates ultra-low jitter; precision timing signals based on the IEEE 1588 Precision Time Protocol (PTP) and Synchronous Ethernet (SyncE). The device can be used as a single timing and synchronization source for a system or two of them can be used as a redundant pair for improved system reliability. Digitally Controlled Oscillators (DCOs) are available to be controlled by IEEE 1588 clock recovery servo software running on an external processor. The device sup	BGA	RC32614A000GBB#HC0	3D model available Symbol and footprint available 3	1 Download Model
	MAX7034AUI/V+ Analog Devices	1	MAXIM INTEGRATED PRODUCTS - MAX7034AUI/V+ - RF Remote Keyless Entry, 300MHz to 450MHz, ASK, -114dBm, 66Kbps, 4.5V to 5.5V Supply, TSSOP-28	Small Outline Packages	MAX7034AUI/V+	3D model available Symbol and footprint available 3	1 Download Model
	MAX7044AKA+ Analog Devices	1	300MHz to 450MHz High-Efficiency, Crystal-Based +13dBm ASK Transmitter, SOT23-8	SOT23 (8-Pin)	MAX7044AKA+	3D model available Symbol and footprint available 3	1 Download Model
	8V89307BNLG Renesas Electronics	1	The 8V89307 is an integrated solution for the Synchronous Equipment Timing Source supporting EEC-Option1, EEC-Option2 clocks in Synchronous Ethernet equipment.The device has a high quality DPLL to provide system clocks for node timing synchronization within a Synchronous Ethernet network. It also integrates an APLL for better jitter performance.An input clock is automatically or manually selected. It supports three primary operating modes: Free-Run, Locked and Holdover. In Free-Run mode, the DPLL refers to	Quad Flat No-Lead	8V89307BNLG	3D model available Symbol and footprint available 3	1 Download Model
	F1200NBGI8 Renesas Electronics	1	The IDT F1200 low noise digital IF VGA featuring FlatNoise™ technology is ideal for commercial radio systems with very high SNR requirements. Its extremely low distortion makes the device very flexible, while the 200 ohm differential input and output impedances allow it to integrate seamlessly into the signal path.	Quad Flat No-Lead	F1200NBGI8	3D model available Symbol and footprint available 3	1 Download Model
	TLK10081CTR Texas Instruments	1	10-Gbps 1 to 8 channel multi-rate redundant link aggregator	BGA	TLK10081CTR	3D model available Symbol and footprint available 3	1 Download Model
	F1241NBGI8 Renesas Electronics	1	The IDT F1241 IF VGA featuring FlatNoise™ technology improves system SNR, especially at lower gain settings. By keeping both IP3O & NF flat while gain is backed off, the system SNR is improved significantly under high level interferer conditions, especially when considering alias noise in an IF sampling receiver. The fast-settling, parallel mode gain step of 1.0 dB coupled with the excellent differential non-linearity allow for SNR to be maximized further by targeting the minimum necessary gain in small, ac	Quad Flat No-Lead	F1241NBGI8	3D model available Symbol and footprint available 3	1 Download Model
	MAX3983UGK+TD Analog Devices	1	Interface - Specialized Quad Copper-Cable Signal Conditioner	Quad Flat No-Lead	MAX3983UGK+TD	3D model available Symbol and footprint available 3	1 Download Model
	BPF8089-01SC6 STMicroelectronics	1	STA8089 / STA8090 LNA impedance matching with ESD protection in SOT23	SOT23 (6-Pin)	BPF8089-01SC6	3D model available Symbol and footprint available 3	1 Download Model

	QPB8808TR13 Qorvo	1	50 - 1218 MHz, 20 dB GaAs Power Doubler Amplifier	Other	QPB8808TR13	3D model not available Symbol and footprint available 2	1 Download Model
	MAX3983UGK+D Analog Devices	1	Interface - Specialized Quad Copper-Cable Signal Conditioner	Quad Flat No-Lead	MAX3983UGK+D	3D model available Symbol and footprint available 3	1 Download Model
	TW3811-TC1-CR Renesas Electronics This part was updated within the past 30 days. Set alerts for model updates on the part download page.	1	SLOC™ (Security Link Over Coax) is a transmission protocol for simultaneously transmitting analog CVBS video and digital IP video over a single coaxial cable. The TW3811 is the receiving end of a SLOC link, converting the single SLOC signal on the coaxial cable back to separate Ethernet digital video data and analog CVBS video. It can be embedded into a DVR to enable one or more SLOC inputs or configured as a stand-alone SLOC-to-IP+CVBS converter. The TW3811 includes an AFE, digital modem, and two Ethernet	Quad Flat Packages	TW3811-TC1-CR	3D model available Symbol and footprint available 3	1 Download Model
	QLX4600LIQSR Renesas Electronics	1	The QLx4600-SL30 is a settable quad receive-side equalizer with extended functionality for advanced protocols operating with line rates up to 6. 25Gb/s such as 4k video capable DisplayPort v1. 2 (HBR1/2), InfiniBand (SDR and DDR) and 10GBase-CX4. The QLx4600-SL30 compensates for the frequency dependent attenuation of copper twin-axial cables, extending the signal reach up to 30m on 24AWG cable. The small form factor, highly-integrated quad design is ideal for high-density data transmission applications incl	Quad Flat No-Lead	QLX4600LIQSR	3D model available Symbol and footprint available 3	1 Download Model
	HMC700LP4TR Analog Devices	1	Phase Locked Loops - PLL 8 GHz 16-Bit Fractional-N PLL	Quad Flat No-Lead	HMC700LP4TR	3D model available Symbol and footprint available 3	1 Download Model
	P9027LP-RAWGI8 Renesas Electronics	1	The P9027LP-R is a highly integrated, low BOM count, single-chip receiver targeted for applications up to 3W. The receiver is designed to convert an AC power signal from a resonant tank into a programmable, regulated voltage ranging from 4.5 to 6.0 V. The device includes a high-efficiency synchronous full-bridge rectifier, a fast-tracking, NMOS LDO, and a charge pump to improve startup under very weak coupling or poor alignment conditions. The P9027LP-R includes a patented internal scheme for modulation and	BGA	P9027LP-RAWGI8	3D model available Symbol and footprint available 3	1 Download Model
	82V3002APVG Renesas Electronics	1	The 82V3002A is a WAN PLL with dual reference inputs. It contains a Digital Phase-Locked Loop (DPLL), which generates ST-BUS clocks and framing signals that are phase locked to a 2.048 MHz, 1.544 MHz or 8 kHz input reference. The 82V3002A provides eight types of clock signals (C1.5o, C3o, C6o, C2o, C4o, C8o, C16o, C32o) and six types of framing signals (F0o, F8o, F16o, F32o, RSP, TSP) for the multitrunk T1 and E1 primary rate transmission links. The 82V3002A is compliant with AT&T TR62411, Telcordia GR- 124	Small Outline Packages	82V3002APVG	3D model available Symbol and footprint available 3	1 Download Model
	82V3255EDG Renesas Electronics	1	The 82V3255 is an integrated, single-chip solution for the Synchronous Equipment Timing Source for Stratum 3, SMC, 4E and 4 clocks in SONET / SDH equipments, DWDM and Wireless base station, such as GSM, 3G, DSL concentrator, Router and Access Network applications. The device supports three types of input clock sources: recovered clock from STM-N or OC-n, PDH network synchronization timing and external synchronization reference timing. Based on ITU-T G.783 and Telcordia GR-253-CORE, the device consists of T0	Quad Flat Packages	82V3255EDG	3D model available Symbol and footprint available 3	1 Download Model
	NCH-RSL15-284-101Q40-ACG onsemi This part was updated within the past 30 days. Set alerts for model updates on the part download page.	1	RF Transceiver RSL15 QFN 284KB	Other	NCH-RSL15-284-101Q40-ACG	3D model available Symbol and footprint available 3	1 Download Model
	82V3001APVG Renesas Electronics	1	The 82V3001A is a WAN PLL with single reference input. It contains a Digital Phase-Locked Loop (DPLL), which generates ST-BUS clocks and framing signals that are phase locked to a 2.048 MHz, 1.544 MHz or 8 kHz input reference. The 82V3001A provides eight types of clock signals (C1.5o, C3o, C6o, C2o, C4o, C8o, C16o, C32o) and six types of framing signals (F0o, F8o, F16o, F32o, RSP, TSP) for the multitrunk T1 and E1 primary rate transmission links. The 82V3001A is compliant with AT&T TR62411, Telcordia GR- 12	Small Outline Packages	82V3001APVG	3D model available Symbol and footprint available 3	1 Download Model
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