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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	7201LA50SO8 Renesas Electronics	1	The 7201 is a 512 x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Small Outline Packages	7201LA50SO8	3D model available Symbol and footprint available 3	1 Download Model
	7201LA50TP Renesas Electronics	1	The 7201 is a 512 x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Dual-In-Line Packages	7201LA50TP	3D model available Symbol and footprint available 3	1 Download Model
	72V01L15JG8 Renesas Electronics	1	The 72V01 is a 512 x 9 dual-port FIFO that operates at Vcc between 3.0V and 3.6V. The device will load and empty data on a first-in/first-out basis. It uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Plastic Leaded Chip Carrier	72V01L15JG8	3D model available Symbol and footprint available 3	1 Download Model
	7206L15JG8 Renesas Electronics	1	The 7206 is a 16K x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Plastic Leaded Chip Carrier	7206L15JG8	3D model not available Symbol and footprint available 2	1 Download Model

	7204L30DB Renesas Electronics	1	The 7204 is a 4K x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Ceramic Dual-In-Line Packages	7204L30DB	3D model not available Symbol and footprint available 2	1 Download Model
	72V06L15JG8 Renesas Electronics	1	The 72V06 is a 16K x 9 dual-port FIFO that operates at Vcc between 3.0V and 3.6V. The device will load and empty data on a first-in/first-out basis. It uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Plastic Leaded Chip Carrier	72V06L15JG8	3D model available Symbol and footprint available 3	1 Download Model
	2302794-2 TE Connectivity	1	High Speed Backplane Connectors, 112 Position, Mating Alignment, Keyed Mating Alignment Type, 7 Row, 16 Column, PCB Mount Header, MULTIGIG RT 3n	Other	2302794-2	3D model available Symbol and footprint available 3	1 Download Model
	2302796-2 TE Connectivity	1	High Speed Backplane Connectors, 56 Position, Mating Alignment, Keyed Mating Alignment Type, 7 Row, 8 Column, PCB Mount Header, MULTIGIG RT 3	Other	2302796-2	3D model available Symbol and footprint available 3	1 Download Model
	RT0603FRE074K53L KEMET	1	THIN FILM CHIP RESISTORS High precision- high stability RT series 0.01% TO 1%, TCR 5 TO 50 sizes 0201/0402/0603/0805/1206/ 1210/2010/2512 RoHS compliant	Resistor Chip	RT0603FRE074K53L	3D model available Symbol and footprint available 3	1 Download Model
	726TLFT Renesas Electronics	1	Used in conjunction with an external pullable quartz crystal, this monolithic integrated circuit replaces more costly hybrid (canned) VCXO devices. The IDT726 is designed primarily for data and clock recovery applications such as ADSL modems, set-top box receivers, and telecom systems. The frequency of the on-chip VCXO is adjusted by an external control voltage to the VIN pin. Since VIN is a high impedance input, it can be driven directly from an PWM RC integrator circuit. Frequency output increases with VI	SOT23 (6-Pin)	726TLFT	3D model available Symbol and footprint available 3	1 Download Model
	2302796-1 TE Connectivity	1	High Speed Backplane Connectors, 56 Position, Mating Alignment, Keyed Mating Alignment Type, 7 Row, 8 Column, PCB Mount Header, MULTIGIG RT 3	Other	2302796-1	3D model available Symbol and footprint available 3	1 Download Model
	2302794-1 TE Connectivity	1	High Speed Backplane Connectors, 112 Position, Mating Alignment, Keyed Mating Alignment Type, 7 Row, 16 Column, PCB Mount Header, MULTIGIG RT 3	Other	2302794-1	3D model available Symbol and footprint available 3	1 Download Model
	72V06L15JG Renesas Electronics	1	The 72V06 is a 16K x 9 dual-port FIFO that operates at Vcc between 3.0V and 3.6V. The device will load and empty data on a first-in/first-out basis. It uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Plastic Leaded Chip Carrier	72V06L15JG	3D model available Symbol and footprint available 3	1 Download Model
	7202LA15SOGI Renesas Electronics	1	The 7202 is a 1K x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Small Outline Packages	7202LA15SOGI	3D model available Symbol and footprint available 3	1 Download Model
	7201LA50TDB Renesas Electronics	1	The 7201 is a 512 x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Ceramic Dual-In-Line Packages	7201LA50TDB	3D model not available Symbol and footprint available 2	1 Download Model

	7205L30DB Renesas Electronics	1	The 7205 is a 8K x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Ceramic Dual-In-Line Packages	7205L30DB	3D model not available Symbol and footprint available 2	1 Download Model
	7207L20JGI Renesas Electronics	1	The 7207 is a 32K x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Plastic Leaded Chip Carrier	7207L20JGI	3D model not available Symbol and footprint available 2	1 Download Model
	7206L20DB Renesas Electronics	1	The 7206 is a 16K x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Ceramic Dual-In-Line Packages	7206L20DB	3D model not available Symbol and footprint available 2	1 Download Model
	7204L12SOG8 Renesas Electronics	1	The 7204 is a 4K x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Small Outline Packages	7204L12SOG8	3D model available Symbol and footprint available 3	1 Download Model
	7204L12JG Renesas Electronics	1	The 7204 is a 4K x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Plastic Leaded Chip Carrier	7204L12JG	3D model not available Symbol and footprint available 2	1 Download Model
	7201LA50DB Renesas Electronics	1	The 7201 is a 512 x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Ceramic Dual-In-Line Packages	7201LA50DB	3D model not available Symbol and footprint available 2	1 Download Model
	7205L20TDB Renesas Electronics	1	The 7205 is a 8K x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Ceramic Dual-In-Line Packages	7205L20TDB	3D model not available Symbol and footprint available 2	1 Download Model
	7202LA35P Renesas Electronics	1	The 7202 is a 1K x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Dual-In-Line Packages	7202LA35P	3D model available Symbol and footprint available 3	1 Download Model
	7204L25SOI8 Renesas Electronics	1	The 7204 is a 4K x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Small Outline Packages	7204L25SOI8	3D model available Symbol and footprint available 3	1 Download Model
	7200L35SO8 Renesas Electronics	1	The 7200 is a 256 x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Small Outline Packages	7200L35SO8	3D model available Symbol and footprint available 3	1 Download Model
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