2/V80 Footprint, Symbol and 3D Model search results

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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	72V801L20TF8 Renesas Electronics	1	The 72V801is a 256 x 9 dual synchronous FIFO that is functionally equivalent to two 72V201 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each FIFOs has a 9-bit input and output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation.	Quad Flat Packages	72V801L20TF8	3D model available Symbol and footprint available 3	1 Download Model
	72V801L10TF8 Renesas Electronics	1	The 72V801is a 256 x 9 dual synchronous FIFO that is functionally equivalent to two 72V201 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each FIFOs has a 9-bit input and output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation.	Quad Flat Packages	72V801L10TF8	3D model available Symbol and footprint available 3	1 Download Model
	72V801L15TFI Renesas Electronics	1	The 72V801is a 256 x 9 dual synchronous FIFO that is functionally equivalent to two 72V201 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each FIFOs has a 9-bit input and output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation.	Quad Flat Packages	72V801L15TFI	3D model available Symbol and footprint available 3	1 Download Model
	DF51K-4P-2V(800) Hirose	1	Headers & Wire Housings Header, 4pos., 2mm pitch, straight, 2A, 250V	Other	DF51K-4P-2V(800)	3D model available Symbol and footprint available 3	1 Download Model

	DF51K-6P-2V(805) Hirose	1	Connector Header Surface Mount, Right Angle 6 position 0.079" (2.00mm) , UL94 V-0 , 250VAC/DC , -55°C ~ 105°C	Other	DF51K-6P-2V(805)	3D model available Symbol and footprint available 3	1 Download Model
	72V805L10PF Renesas Electronics	1	The 72V805 is a 256 x 18 dual sync FIFO with clocked read and write controls that is functionally equivalent to two 72V205 FIFO's in a single package with all associated control, data, and flag lines assigned to independent pins. This FIFO is useful for optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous	Quad Flat Packages	72V805L10PF	3D model available Symbol and footprint available 3	1 Download Model
	72V801L20PF Renesas Electronics	1	The 72V801is a 256 x 9 dual synchronous FIFO that is functionally equivalent to two 72V201 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each FIFOs has a 9-bit input and output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation.	Quad Flat Packages	72V801L20PF	3D model available Symbol and footprint available 3	1 Download Model
	72V801L15PF Renesas Electronics	1	The 72V801is a 256 x 9 dual synchronous FIFO that is functionally equivalent to two 72V201 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each FIFOs has a 9-bit input and output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation.	Quad Flat Packages	72V801L15PF	3D model available Symbol and footprint available 3	1 Download Model
	DF51K-2P-2V(805) Hirose	1	Headers & Wire Housings Header, 2pos., 2mm pitch, straight, 3A, 250V	Other	DF51K-2P-2V(805)	3D model available Symbol and footprint available 3	1 Download Model
	ispLSI 2032V-80LJ44 Lattice Semiconductor	1	CPLD - Complex Programmable Logic Devices	Plastic Leaded Chip Carrier	ispLSI 2032V-80LJ44	3D model not available Symbol and footprint available 2	1 Download Model
	72V801L15TF8 Renesas Electronics	1	The 72V801is a 256 x 9 dual synchronous FIFO that is functionally equivalent to two 72V201 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each FIFOs has a 9-bit input and output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation.	Quad Flat Packages	72V801L15TF8	3D model available Symbol and footprint available 3	1 Download Model
	72V805L20PF8 Renesas Electronics	1	The 72V805 is a 256 x 18 dual sync FIFO with clocked read and write controls that is functionally equivalent to two 72V205 FIFO's in a single package with all associated control, data, and flag lines assigned to independent pins. This FIFO is useful for optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous	Quad Flat Packages	72V805L20PF8	3D model available Symbol and footprint available 3	1 Download Model
	72V801L10TF Renesas Electronics	1	The 72V801is a 256 x 9 dual synchronous FIFO that is functionally equivalent to two 72V201 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each FIFOs has a 9-bit input and output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation.	Quad Flat Packages	72V801L10TF	3D model available Symbol and footprint available 3	1 Download Model
	S2V80-5061 Shindengen Electric Manufacturing Co., Ltd.	1	General Rectifying Diodes 800V, 1.7A, AX10.	Other	S2V80-5061	3D model not available Symbol and footprint available 2	1 Download Model
	ispLSI 2032V-80LT44 Lattice Semiconductor	1	CPLD - Complex Programmable Logic Devices	Quad Flat Packages	ispLSI 2032V-80LT44	3D model available Symbol and footprint available 3	1 Download Model

	KN14(0.7)-2S/2-V(800) Hirose	1	CONN SOCKET FPC 0.7MM	Other	KN14(0.7)-2S/2-V(800)	3D model available Symbol and footprint available 3	1 Download Model
	72V801L10PFG Renesas Electronics	1	The 72V801is a 256 x 9 dual synchronous FIFO that is functionally equivalent to two 72V201 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each FIFOs has a 9-bit input and output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation.	Quad Flat Packages	72V801L10PFG	3D model available Symbol and footprint available 3	1 Download Model
	72V801L15TF Renesas Electronics	1	The 72V801is a 256 x 9 dual synchronous FIFO that is functionally equivalent to two 72V201 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each FIFOs has a 9-bit input and output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation.	Quad Flat Packages	72V801L15TF	3D model available Symbol and footprint available 3	1 Download Model
	72V805L20PF Renesas Electronics	1	The 72V805 is a 256 x 18 dual sync FIFO with clocked read and write controls that is functionally equivalent to two 72V205 FIFO's in a single package with all associated control, data, and flag lines assigned to independent pins. This FIFO is useful for optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous	Quad Flat Packages	72V805L20PF	3D model available Symbol and footprint available 3	1 Download Model
	72V805L15PFI8 Renesas Electronics	1	The 72V805 is a 256 x 18 dual sync FIFO with clocked read and write controls that is functionally equivalent to two 72V205 FIFO's in a single package with all associated control, data, and flag lines assigned to independent pins. This FIFO is useful for optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous	Quad Flat Packages	72V805L15PFI8	3D model available Symbol and footprint available 3	1 Download Model
	72V801L15PFGI Renesas Electronics	1	The 72V801is a 256 x 9 dual synchronous FIFO that is functionally equivalent to two 72V201 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each FIFOs has a 9-bit input and output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation.	Quad Flat Packages	72V801L15PFGI	3D model available Symbol and footprint available 3	1 Download Model
	72V801L20TF Renesas Electronics	1	The 72V801is a 256 x 9 dual synchronous FIFO that is functionally equivalent to two 72V201 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each FIFOs has a 9-bit input and output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation.	Quad Flat Packages	72V801L20TF	3D model not available Symbol and footprint available 2	1 Download Model
	72V801L15PFGI8 Renesas Electronics	1	The 72V801is a 256 x 9 dual synchronous FIFO that is functionally equivalent to two 72V201 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each FIFOs has a 9-bit input and output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation.	Quad Flat Packages	72V801L15PFGI8	3D model available Symbol and footprint available 3	1 Download Model
	S2V80-5060 Shindengen Electric Manufacturing Co., Ltd.	1	General Rectifying Diodes・High Voltage・Pb free terminal・RoHS:Yes 800V, 1.7A, AX10.	Other	S2V80-5060	3D model not available Symbol and footprint available 2	1 Download Model
	S2V80-5000 Shindengen Electric Manufacturing Co., Ltd.	1	General Rectifying Diodes・High Voltage・Pb free terminal・RoHS:Yes 800V, 1.7A, AX10.	Other	S2V80-5000	3D model not available Symbol and footprint available 2	1 Download Model
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