25LB2 Footprint, Symbol and 3D Model search results

Showing 25 of 361 results

Price & Stock Powered by

Filter by Manufacturer

Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	25LB22-H Grayhill This part was updated within the past 30 days. Set alerts for model updates on the part download page.	1	Rotary Encoder Mechanical 16 Hexadecimal (Absolute) Vertical Panel, PCB Through Hole 250 mA -40 C° to +85 C°	Other	25LB22-H	3D model available Symbol and footprint available 3	1 Download Model
	25LB22-G Grayhill	1	Grayhill Optical Encoder with a 6.35 mm Flat Shaft, Panel Mount	Other	25LB22-G	3D model available Symbol and footprint available 3	1 Download Model
	25LB22-Q-Z Grayhill	1	Encoders Encoder, Black, 22.5°, quadrature, 16 positions, with bracket	Other	25LB22-Q-Z	3D model available Symbol and footprint available 3	1 Download Model
	GD25LB256E3IRR GigaDevice Semiconductor (HK) Limited	1	NOR Flash	Other	GD25LB256E3IRR	3D model available Symbol and footprint available 3	1 Download Model

	72225LB25PF8 Renesas Electronics	1	The 72225 is a 1K x 8 First-In, First-Out memory with clocked read and write controls and would be useful for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. These FIFOs have 18-bit input and output ports. The read clock can be tied to the write clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation. These devices are depth expandable using a Daisy-Chain technique	Quad Flat Packages	72225LB25PF8	3D model available Symbol and footprint available 3	1 Download Model
	72225LB25JI Renesas Electronics	1	The 72225 is a 1K x 8 First-In, First-Out memory with clocked read and write controls and would be useful for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. These FIFOs have 18-bit input and output ports. The read clock can be tied to the write clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation. These devices are depth expandable using a Daisy-Chain technique	Plastic Leaded Chip Carrier	72225LB25JI	3D model not available Symbol and footprint available 2	1 Download Model
	72825LB25PF Renesas Electronics	1	The 72825 is a 1K x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72225 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for	Quad Flat Packages	72825LB25PF	3D model available Symbol and footprint available 3	1 Download Model
	IS46TR16256ECL-125LB2LA2 Integrated Silicon Solution Inc.	1	DRAM Automotive (Tc: -40 to +105C), 4G, 1.35V, DDR3L w/ ECC,256Mx16, 1600MT/s a. 12-11-11, 96 ball BGA (10mm x14mm) RoHS	BGA	IS46TR16256ECL-125LB2LA2	3D model available Symbol and footprint available 3	1 Download Model
	72225LB25TFI8 Renesas Electronics	1	The 72225 is a 1K x 8 First-In, First-Out memory with clocked read and write controls and would be useful for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. These FIFOs have 18-bit input and output ports. The read clock can be tied to the write clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation. These devices are depth expandable using a Daisy-Chain technique	Quad Flat Packages	72225LB25TFI8	3D model available Symbol and footprint available 3	1 Download Model
	72225LB25TFI Renesas Electronics	1	The 72225 is a 1K x 8 First-In, First-Out memory with clocked read and write controls and would be useful for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. These FIFOs have 18-bit input and output ports. The read clock can be tied to the write clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation. These devices are depth expandable using a Daisy-Chain technique	Quad Flat Packages	72225LB25TFI	3D model available Symbol and footprint available 3	1 Download Model
	72225LB25TF Renesas Electronics	1	The 72225 is a 1K x 8 First-In, First-Out memory with clocked read and write controls and would be useful for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. These FIFOs have 18-bit input and output ports. The read clock can be tied to the write clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation. These devices are depth expandable using a Daisy-Chain technique	Quad Flat Packages	72225LB25TF	3D model available Symbol and footprint available 3	1 Download Model
	72225LB25J Renesas Electronics	1	The 72225 is a 1K x 8 First-In, First-Out memory with clocked read and write controls and would be useful for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. These FIFOs have 18-bit input and output ports. The read clock can be tied to the write clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation. These devices are depth expandable using a Daisy-Chain technique	Plastic Leaded Chip Carrier	72225LB25J	3D model not available Symbol and footprint available 2	1 Download Model
	72225LB25TF8 Renesas Electronics	1	The 72225 is a 1K x 8 First-In, First-Out memory with clocked read and write controls and would be useful for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. These FIFOs have 18-bit input and output ports. The read clock can be tied to the write clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation. These devices are depth expandable using a Daisy-Chain technique	Quad Flat Packages	72225LB25TF8	3D model available Symbol and footprint available 3	1 Download Model
	72225LB25PF Renesas Electronics	1	The 72225 is a 1K x 8 First-In, First-Out memory with clocked read and write controls and would be useful for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. These FIFOs have 18-bit input and output ports. The read clock can be tied to the write clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation. These devices are depth expandable using a Daisy-Chain technique	Quad Flat Packages	72225LB25PF	3D model available Symbol and footprint available 3	1 Download Model
	IS43TR16256ECL-125LB2LI Integrated Silicon Solution Inc.	1	Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V• Low Voltage (L): VDD and VDDQ = 1.35V + 0.1V, -0.067V - Backward compatible to 1.5V• 8 internal banks for concurrent operation• 8n-Bit pre-fetch architecture• Programmable CAS Latency• Programmable Additive Latency: 0, CL-1,CL-2• Programmable CAS WRITE latency (CWL) basedon tCK• Programmable Burst Length: 4 and 8• Programmable Burst Sequence: Sequential orInterleave• BL switch on the fly• Auto Self Refresh(ASR)• Self Refresh Tempera	BGA	IS43TR16256ECL-125LB2LI	3D model available Symbol and footprint available 3	1 Download Model

	72225LB25JI8 Renesas Electronics	1	The 72225 is a 1K x 8 First-In, First-Out memory with clocked read and write controls and would be useful for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. These FIFOs have 18-bit input and output ports. The read clock can be tied to the write clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation. These devices are depth expandable using a Daisy-Chain technique	Plastic Leaded Chip Carrier	72225LB25JI8	3D model not available Symbol and footprint available 2	1 Download Model
	72225LB25J8 Renesas Electronics	1	The 72225 is a 1K x 8 First-In, First-Out memory with clocked read and write controls and would be useful for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. These FIFOs have 18-bit input and output ports. The read clock can be tied to the write clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation. These devices are depth expandable using a Daisy-Chain technique	Plastic Leaded Chip Carrier	72225LB25J8	3D model not available Symbol and footprint available 2	1 Download Model
	72825LB25PF8 Renesas Electronics	1	The 72825 is a 1K x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72225 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for	Quad Flat Packages	72825LB25PF8	3D model available Symbol and footprint available 3	1 Download Model
	GD25LB256EYIGR GigaDevice Semiconductor (HK) Limited	1	256Mbit, WSON8 8*6mm, Industrial(-40? to +85?) GigaDevice	Small Outline No-lead	GD25LB256EYIGR	3D model available Symbol and footprint available 3	1 Download Model
	72225LB25PFI8 Renesas Electronics	1	The 72225 is a 1K x 8 First-In, First-Out memory with clocked read and write controls and would be useful for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. These FIFOs have 18-bit input and output ports. The read clock can be tied to the write clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation. These devices are depth expandable using a Daisy-Chain technique	Quad Flat Packages	72225LB25PFI8	3D model available Symbol and footprint available 3	1 Download Model
	72225LB25PFI Renesas Electronics	1	The 72225 is a 1K x 8 First-In, First-Out memory with clocked read and write controls and would be useful for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. These FIFOs have 18-bit input and output ports. The read clock can be tied to the write clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation. These devices are depth expandable using a Daisy-Chain technique	Quad Flat Packages	72225LB25PFI	3D model available Symbol and footprint available 3	1 Download Model
	25LB22-Q Grayhill	1	Grayhill Mechanical Rotary Encoder with a 6.35 mm Flat Shaft, Panel Mount		25LB22-Q	3D model available Symbol and footprint not available 1	1 Download Model
	72825LB25BGG8 Integrated Device Technology Inc	1	FIFO, 1KX18, 15ns, Synchronous, CMOS, PBGA121		72825LB25BGG8	3D model not available Symbol and footprint not available 0	0 Build or Request
	FS200T3.25LB20 Thomas & Betts	1	Interconnection Device		FS200T3.25LB20	3D model not available Symbol and footprint not available 0	0 Build or Request
	FQV225LB20PF AMIC Technology	1	FIFO, 1KX18, 12ns, Synchronous, CMOS, PQFP64		FQV225LB20PF	3D model not available Symbol and footprint not available 0	0 Build or Request
1 2 3 4 5 6 7 8 9

Can't find what you're looking for? Request this part

25LB2 Model Download Search Results

Popular DRAMs