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Image Part Number D.S Description Package Category Prices / Stock Model Action
Image Part Number D.S Description Package Category Prices / Stock Model Action
Part Image Part Image 1 72 Position, High-Reliability Tiger Eye™ Terminal Strips, .050" Pitch, Surface Mount, Vertical Other TFM-136-32-L-D-LC 1 Download Model
Part Image Part Image 1 PIN Diodes Anti-parallel PIN Diode Limiter Other SKY16603-632LF 1 Download Model
Part Image Part Image 1 72 Position, High-Reliability Tiger Eye™ Terminal Strips, .050" Pitch, Surface Mount, Vertical Other TFM-136-32-LM-D-LC 1 Download Model
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72V3632L10PFG Renesas Electronics
1 The 72V3632 is a 3.3V version of the 723632. Two independent 512 x 36 dual-port SRAM FIFOs onboard each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. Quad Flat Packages 72V3632L10PFG 1 Download Model
Part Image Part Image 1 High-Reliability Tiger Eye™ Terminal Strips, .050" Pitch Other TFM-136-32-LM-D-A-P-TR 1 Download Model
Part Image Part Image 1 High-Reliability Tiger Eye™ Terminal Strips, .050" Pitch Other TFM-136-32-LM-D-A 1 Download Model
Part Image Part Image 1 High-Reliability Tiger Eye™ Terminal Strips, .050" Pitch Other TFM-136-32-L-D-A-P-TR 1 Download Model
Part Image Part Image 1 72 Position, High-Reliability Tiger Eye™ Terminal Strips, .050" Pitch, Surface Mount, Vertical Other TFM-136-32-LM-D-P 1 Download Model
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723632L15PFG Renesas Electronics
1 The 723632 is a monolithic Bidirectional SyncFIFO (clocked) memory. Two independent 512 x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. Quad Flat Packages 723632L15PFG 1 Download Model
Part Image Part Image 1 72 Position, High-Reliability Tiger Eye™ Terminal Strips, .050" Pitch, Surface Mount, Vertical Other TFM-136-32-LM-D-K-TR 1 Download Model
Part Image Part Image 1 High-Reliability Tiger Eye™ Terminal Strips, .050" Pitch Other TFM-136-32-L-D 1 Download Model
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723632L15PF Renesas Electronics
1 The 723632 is a monolithic Bidirectional SyncFIFO (clocked) memory. Two independent 512 x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. Quad Flat Packages 723632L15PF 1 Download Model
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723632L12PF8 Renesas Electronics
1 The 723632 is a monolithic Bidirectional SyncFIFO (clocked) memory. Two independent 512 x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. Quad Flat Packages 723632L12PF8 1 Download Model
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723632L12PF Renesas Electronics
1 The 723632 is a monolithic Bidirectional SyncFIFO (clocked) memory. Two independent 512 x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. Quad Flat Packages 723632L12PF 1 Download Model
Part Image Part Image 1 High-Reliability Tiger Eye™ Terminal Strips, .050" Pitch Other TFM-136-32-LM-D 1 Download Model
Part Image Part Image
723632L15PFG8 Renesas Electronics
1 The 723632 is a monolithic Bidirectional SyncFIFO (clocked) memory. Two independent 512 x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. Quad Flat Packages 723632L15PFG8 1 Download Model
Part Image Part Image 1 High-Reliability Tiger Eye™ Terminal Strips, .050" Pitch Other TFM-136-32-L-D-A 1 Download Model
Part Image Part Image
72V3632L10PFG8 Renesas Electronics
1 The 72V3632 is a 3.3V version of the 723632. Two independent 512 x 36 dual-port SRAM FIFOs onboard each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. Quad Flat Packages 72V3632L10PFG8 1 Download Model
Part Image Part Image
723632L15PF8 Renesas Electronics
1 The 723632 is a monolithic Bidirectional SyncFIFO (clocked) memory. Two independent 512 x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. Quad Flat Packages 723632L15PF8 1 Download Model
Part Image Part Image
72V3632L15PFGI Renesas Electronics
1 The 72V3632 is a 3.3V version of the 723632. Two independent 512 x 36 dual-port SRAM FIFOs onboard each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. Quad Flat Packages 72V3632L15PFGI 1 Download Model
Part Image Part Image 1 72 Position, High-Reliability Tiger Eye™ Terminal Strips, .050" Pitch, Surface Mount, Vertical Other TFM-136-32-L-D-K-TR 1 Download Model
Part Image Part Image 1 72 Position, High-Reliability Tiger Eye™ Terminal Strips, .050" Pitch, Surface Mount, Vertical Other TFM-136-32-L-D-P 1 Download Model
Part Image Part Image
72V3632L15PFGI8 Renesas Electronics
1 The 72V3632 is a 3.3V version of the 723632. Two independent 512 x 36 dual-port SRAM FIFOs onboard each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. Quad Flat Packages 72V3632L15PFGI8 1 Download Model
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3632L680KTE TE Connectivity
1 General Purpose Inductor, 68uH, 10%, 1 Element, SMD 3632L680KTE 0 Build or Request
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3632L220KTE TE Connectivity
1 General Purpose Inductor, 22uH, 10%, 1 Element, SMD 3632L220KTE 0 Build or Request
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