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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	723631L15PFG8 Renesas Electronics	1	The 723631 is a 512 x 36 Sync FIFO memory that supports clock frequencies up to 67 MHz and has read access times as fast as 12ns. The FIFO memory has retransmit capability, which allows previously read data to be accessed again. Communication between each port may take place with two 36-bit mailbox registers. All data transfers through a port are gated to the LOW-to-HIGH transition of a continuous port clock by enable signals.	Quad Flat Packages	723631L15PFG8	3D model available Symbol and footprint available 3	1 Download Model
	723633L12PFG8 Renesas Electronics	1	The 723633 is a 512 x 36 unidirectional Sync FIFO memory which supports clock frequencies up to 83 MHz and has read access times as fast as 8 ns. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. Communication between each port may bypass the FIFO via two mailbox registers.	Quad Flat Packages	723633L12PFG8	3D model available Symbol and footprint available 3	1 Download Model
	723631L20PFGI8 Renesas Electronics	1	The 723631 is a 512 x 36 Sync FIFO memory that supports clock frequencies up to 67 MHz and has read access times as fast as 12ns. The FIFO memory has retransmit capability, which allows previously read data to be accessed again. Communication between each port may take place with two 36-bit mailbox registers. All data transfers through a port are gated to the LOW-to-HIGH transition of a continuous port clock by enable signals.	Quad Flat Packages	723631L20PFGI8	3D model available Symbol and footprint available 3	1 Download Model
	723632L15PFG8 Renesas Electronics	1	The 723632 is a monolithic Bidirectional SyncFIFO (clocked) memory. Two independent 512 x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control.	Quad Flat Packages	723632L15PFG8	3D model available Symbol and footprint available 3	1 Download Model

	723632L15PFG Renesas Electronics	1	The 723632 is a monolithic Bidirectional SyncFIFO (clocked) memory. Two independent 512 x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control.	Quad Flat Packages	723632L15PFG	3D model available Symbol and footprint available 3	1 Download Model
	723633L12PFG Renesas Electronics	1	The 723633 is a 512 x 36 unidirectional Sync FIFO memory which supports clock frequencies up to 83 MHz and has read access times as fast as 8 ns. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. Communication between each port may bypass the FIFO via two mailbox registers.	Quad Flat Packages	723633L12PFG	3D model available Symbol and footprint available 3	1 Download Model
	723631L20PFGI Renesas Electronics	1	The 723631 is a 512 x 36 Sync FIFO memory that supports clock frequencies up to 67 MHz and has read access times as fast as 12ns. The FIFO memory has retransmit capability, which allows previously read data to be accessed again. Communication between each port may take place with two 36-bit mailbox registers. All data transfers through a port are gated to the LOW-to-HIGH transition of a continuous port clock by enable signals.	Quad Flat Packages	723631L20PFGI	3D model available Symbol and footprint available 3	1 Download Model
	723631L15PFG Renesas Electronics	1	The 723631 is a 512 x 36 Sync FIFO memory that supports clock frequencies up to 67 MHz and has read access times as fast as 12ns. The FIFO memory has retransmit capability, which allows previously read data to be accessed again. Communication between each port may take place with two 36-bit mailbox registers. All data transfers through a port are gated to the LOW-to-HIGH transition of a continuous port clock by enable signals.	Quad Flat Packages	723631L15PFG	3D model available Symbol and footprint available 3	1 Download Model
	723631L15PF Renesas Electronics	1	The 723631 is a 512 x 36 Sync FIFO memory that supports clock frequencies up to 67 MHz and has read access times as fast as 12ns. The FIFO memory has retransmit capability, which allows previously read data to be accessed again. Communication between each port may take place with two 36-bit mailbox registers. All data transfers through a port are gated to the LOW-to-HIGH transition of a continuous port clock by enable signals.	Quad Flat Packages	723631L15PF	3D model available Symbol and footprint available 3	1 Download Model
	723631L20PFI8 Renesas Electronics	1	The 723631 is a 512 x 36 Sync FIFO memory that supports clock frequencies up to 67 MHz and has read access times as fast as 12ns. The FIFO memory has retransmit capability, which allows previously read data to be accessed again. Communication between each port may take place with two 36-bit mailbox registers. All data transfers through a port are gated to the LOW-to-HIGH transition of a continuous port clock by enable signals.	Quad Flat Packages	723631L20PFI8	3D model available Symbol and footprint available 3	1 Download Model
	723636L15PF Renesas Electronics	1	The 723636 is a 512 x 36 x 2 Triple Bus sync FIFO memory which supports clock frequencies up to 83 MHz and has read access times as fast as 8 ns. FIFO data can be read out and written using either 18-bit or 9-bit formats with a choice of Big- or Little-Endian configurations. The clocks for each port are independent of one another and can be asynchronous or coincident. These devices can operate in the IDT Standard mode or First Word Fall Through mode.	Quad Flat Packages	723636L15PF	3D model available Symbol and footprint available 3	1 Download Model
	723636L12PF8 Renesas Electronics	1	The 723636 is a 512 x 36 x 2 Triple Bus sync FIFO memory which supports clock frequencies up to 83 MHz and has read access times as fast as 8 ns. FIFO data can be read out and written using either 18-bit or 9-bit formats with a choice of Big- or Little-Endian configurations. The clocks for each port are independent of one another and can be asynchronous or coincident. These devices can operate in the IDT Standard mode or First Word Fall Through mode.	Quad Flat Packages	723636L12PF8	3D model available Symbol and footprint available 3	1 Download Model
	723632L12PF8 Renesas Electronics	1	The 723632 is a monolithic Bidirectional SyncFIFO (clocked) memory. Two independent 512 x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control.	Quad Flat Packages	723632L12PF8	3D model available Symbol and footprint available 3	1 Download Model
	723636L12PF Renesas Electronics	1	The 723636 is a 512 x 36 x 2 Triple Bus sync FIFO memory which supports clock frequencies up to 83 MHz and has read access times as fast as 8 ns. FIFO data can be read out and written using either 18-bit or 9-bit formats with a choice of Big- or Little-Endian configurations. The clocks for each port are independent of one another and can be asynchronous or coincident. These devices can operate in the IDT Standard mode or First Word Fall Through mode.	Quad Flat Packages	723636L12PF	3D model available Symbol and footprint available 3	1 Download Model
	723632L12PF Renesas Electronics	1	The 723632 is a monolithic Bidirectional SyncFIFO (clocked) memory. Two independent 512 x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control.	Quad Flat Packages	723632L12PF	3D model available Symbol and footprint available 3	1 Download Model

	723634L15PF Renesas Electronics	1	The 723634 is a CMOS bidirectional synchronous (clocked) FIFO. Two independent 512 x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control.	Quad Flat Packages	723634L15PF	3D model available Symbol and footprint available 3	1 Download Model
	723633L15PF8 Renesas Electronics	1	The 723633 is a 512 x 36 unidirectional Sync FIFO memory which supports clock frequencies up to 83 MHz and has read access times as fast as 8 ns. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. Communication between each port may bypass the FIFO via two mailbox registers.	Quad Flat Packages	723633L15PF8	3D model available Symbol and footprint available 3	1 Download Model
	723631L20PF8 Renesas Electronics	1	The 723631 is a 512 x 36 Sync FIFO memory that supports clock frequencies up to 67 MHz and has read access times as fast as 12ns. The FIFO memory has retransmit capability, which allows previously read data to be accessed again. Communication between each port may take place with two 36-bit mailbox registers. All data transfers through a port are gated to the LOW-to-HIGH transition of a continuous port clock by enable signals.	Quad Flat Packages	723631L20PF8	3D model available Symbol and footprint available 3	1 Download Model
	723634L15PF8 Renesas Electronics	1	The 723634 is a CMOS bidirectional synchronous (clocked) FIFO. Two independent 512 x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control.	Quad Flat Packages	723634L15PF8	3D model available Symbol and footprint available 3	1 Download Model
	723633L12PF8 Renesas Electronics	1	The 723633 is a 512 x 36 unidirectional Sync FIFO memory which supports clock frequencies up to 83 MHz and has read access times as fast as 8 ns. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. Communication between each port may bypass the FIFO via two mailbox registers.	Quad Flat Packages	723633L12PF8	3D model available Symbol and footprint available 3	1 Download Model
	723632L15PF Renesas Electronics	1	The 723632 is a monolithic Bidirectional SyncFIFO (clocked) memory. Two independent 512 x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control.	Quad Flat Packages	723632L15PF	3D model available Symbol and footprint available 3	1 Download Model
	723634L12PF Renesas Electronics	1	The 723634 is a CMOS bidirectional synchronous (clocked) FIFO. Two independent 512 x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control.	Quad Flat Packages	723634L12PF	3D model available Symbol and footprint available 3	1 Download Model
	723636L15PF8 Renesas Electronics	1	The 723636 is a 512 x 36 x 2 Triple Bus sync FIFO memory which supports clock frequencies up to 83 MHz and has read access times as fast as 8 ns. FIFO data can be read out and written using either 18-bit or 9-bit formats with a choice of Big- or Little-Endian configurations. The clocks for each port are independent of one another and can be asynchronous or coincident. These devices can operate in the IDT Standard mode or First Word Fall Through mode.	Quad Flat Packages	723636L15PF8	3D model available Symbol and footprint available 3	1 Download Model
	723632L15PF8 Renesas Electronics	1	The 723632 is a monolithic Bidirectional SyncFIFO (clocked) memory. Two independent 512 x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control.	Quad Flat Packages	723632L15PF8	3D model available Symbol and footprint available 3	1 Download Model
	723634L12PF8 Renesas Electronics	1	The 723634 is a CMOS bidirectional synchronous (clocked) FIFO. Two independent 512 x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control.	Quad Flat Packages	723634L12PF8	3D model available Symbol and footprint available 3	1 Download Model
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