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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	72805 Molex	1	Barrier Strip Terminal Block		72805	3D model not available Symbol and footprint not available 0	0 Build or Request
	72805LB10PFG Renesas Electronics	1	The 72805 is a 256 x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72205 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for si	Quad Flat Packages	72805LB10PFG	3D model available Symbol and footprint available 3	1 Download Model
	72805 WIHA	0			72805	3D model not available Symbol and footprint not available 0	0 Build or Request
	72805LB25PF8 Renesas Electronics	1	The 72805 is a 256 x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72205 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for si	Quad Flat Packages	72805LB25PF8	3D model available Symbol and footprint available 3	1 Download Model

	72805LB10PF Renesas Electronics	1	The 72805 is a 256 x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72205 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for si	Quad Flat Packages	72805LB10PF	3D model available Symbol and footprint available 3	1 Download Model
	72805LB15PFI8 Renesas Electronics	1	The 72805 is a 256 x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72205 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for si	Quad Flat Packages	72805LB15PFI8	3D model available Symbol and footprint available 3	1 Download Model
	72805LB15PF8 Renesas Electronics	1	The 72805 is a 256 x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72205 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for si	Quad Flat Packages	72805LB15PF8	3D model available Symbol and footprint available 3	1 Download Model
	72805LB15PF Renesas Electronics	1	The 72805 is a 256 x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72205 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for si	Quad Flat Packages	72805LB15PF	3D model available Symbol and footprint available 3	1 Download Model
	72805LB25PF Renesas Electronics	1	The 72805 is a 256 x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72205 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for si	Quad Flat Packages	72805LB25PF	3D model available Symbol and footprint available 3	1 Download Model
	72805LB10PF8 Renesas Electronics	1	The 72805 is a 256 x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72205 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for si	Quad Flat Packages	72805LB10PF8	3D model available Symbol and footprint available 3	1 Download Model
	72805LB15PFI Renesas Electronics	1	The 72805 is a 256 x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72205 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for si	Quad Flat Packages	72805LB15PFI	3D model available Symbol and footprint available 3	1 Download Model
	1728050000 Weidmüller	1	PCB plug-in connector, male header, closed side, THT solder connection, 3.50 mm, Number of poles: 18, 90°, Solder pin length: 3.5 mm, tinned, black, Box	Other	1728050000	3D model available Symbol and footprint available 3	1 Download Model
	VXR7-280505D VPT	1	Input: 9 V to 60 V continuous, 6 V to 100 V transient 7 W, dual output of 3.3 V, 5 V, 12 V, 15 V -55 °C to 105 °C Operation	Other	VXR7-280505D	3D model available Symbol and footprint available 3	1 Download Model
	72805LB25BG8 Renesas Electronics	1	The 72805 is a 256 x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72205 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for si		72805LB25BG8	3D model not available Symbol and footprint not available 0	0 Build or Request
	72805LB15BG8 Renesas Electronics	1	The 72805 is a 256 x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72205 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for si		72805LB15BG8	3D model not available Symbol and footprint not available 0	0 Build or Request

	72805LB15BG Renesas Electronics	1	The 72805 is a 256 x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72205 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for si		72805LB15BG	3D model not available Symbol and footprint not available 0	0 Build or Request
	72805LB25BG Renesas Electronics	1	The 72805 is a 256 x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72205 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for si		72805LB25BG	3D model not available Symbol and footprint not available 0	0 Build or Request
	72805LB15PFG8 Renesas Electronics Corporation	1	FIFO, 256X18, 10ns, Synchronous, CMOS, PQFP128		72805LB15PFG8	3D model not available Symbol and footprint not available 0	0 Build or Request
	72805LB10PFG8 Renesas Electronics Corporation	1	FIFO, 256X18, 6.5ns, Synchronous, CMOS, PQFP128		72805LB10PFG8	3D model not available Symbol and footprint not available 0	0 Build or Request
	72805LB15PFI8 Integrated Device Technology Inc	1	TQFP-128, Reel		72805LB15PFI8	3D model not available Symbol and footprint not available 0	0 Build or Request
	72805LB15PF8 Integrated Device Technology Inc	1	TQFP-128, Reel		72805LB15PF8	3D model not available Symbol and footprint not available 0	0 Build or Request
	72805LB15BGGI Integrated Device Technology Inc	1	FIFO, 256X18, 10ns, Synchronous, CMOS, PBGA121, 16 X 16 MM, GREEN, PLASTIC, BGA-121		72805LB15BGGI	3D model not available Symbol and footprint not available 0	0 Build or Request
	72805LB10PFG Integrated Device Technology Inc	1	TQFP-128, Tray		72805LB10PFG	3D model not available Symbol and footprint not available 0	0 Build or Request
	72805LB10BGG Integrated Device Technology Inc	1	FIFO, 256X18, 6.5ns, Synchronous, CMOS, PBGA121, 16 X 16 MM, GREEN, PLASTIC, BGA-121		72805LB10BGG	3D model not available Symbol and footprint not available 0	0 Build or Request
	72805LB10PFG8 Integrated Device Technology Inc	1	FIFO, 256X18, 6.5ns, Synchronous, CMOS, PQFP128, GREEN, TQFP-128		72805LB10PFG8	3D model not available Symbol and footprint not available 0	0 Build or Request
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