7280L Footprint, Symbol and 3D Model search results

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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	7280L12PA Renesas Electronics	1	The 7280 is a dual-FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/reception error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Small Outline Packages	7280L12PA	3D model available Symbol and footprint available 3	1 Download Model
	7280L20PA Renesas Electronics	1	The 7280 is a dual-FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/reception error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Small Outline Packages	7280L20PA	3D model available Symbol and footprint available 3	1 Download Model
	7280L12PAG8 Renesas Electronics	1	The 7280 is a dual-FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/reception error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Small Outline Packages	7280L12PAG8	3D model available Symbol and footprint available 3	1 Download Model
	7280L15PA Renesas Electronics	1	The 7280 is a dual-FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/reception error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Small Outline Packages	7280L15PA	3D model available Symbol and footprint available 3	1 Download Model

	7280L12PAG Renesas Electronics	1	The 7280 is a dual-FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/reception error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Small Outline Packages	7280L12PAG	3D model available Symbol and footprint available 3	1 Download Model
	7280L20PA8 Renesas Electronics	1	The 7280 is a dual-FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/reception error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Small Outline Packages	7280L20PA8	3D model available Symbol and footprint available 3	1 Download Model
	7280L12PA8 Renesas Electronics	1	The 7280 is a dual-FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/reception error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Small Outline Packages	7280L12PA8	3D model available Symbol and footprint available 3	1 Download Model
	7280L15PA8 Renesas Electronics	1	The 7280 is a dual-FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/reception error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Small Outline Packages	7280L15PA8	3D model available Symbol and footprint available 3	1 Download Model
	7280L15PAI Renesas Electronics	1	The 7280 is a dual-FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/reception error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Small Outline Packages	7280L15PAI	3D model available Symbol and footprint available 3	1 Download Model
	7280L15PAI8 Renesas Electronics	1	The 7280 is a dual-FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/reception error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.	Small Outline Packages	7280L15PAI8	3D model available Symbol and footprint available 3	1 Download Model
	7280L15PAG8 Integrated Device Technology Inc	1	FIFO, 512X9, 15ns, Asynchronous, CMOS, PDSO56		7280L15PAG8	3D model not available Symbol and footprint not available 0	0 Build or Request
	7280L15PAG8 Renesas Electronics Corporation	1	FIFO, 512X9, 15ns, Asynchronous, CMOS, PDSO56		7280L15PAG8	3D model not available Symbol and footprint not available 0	0 Build or Request
	7280L25PAI Integrated Device Technology Inc	1	FIFO, 512X9, 25ns, Asynchronous, CMOS, PDSO56		7280L25PAI	3D model not available Symbol and footprint not available 0	0 Build or Request
	7280L25PA Integrated Device Technology Inc	1	FIFO, 512X9, 25ns, Asynchronous, CMOS, PDSO56		7280L25PA	3D model not available Symbol and footprint not available 0	0 Build or Request
	7280L15PAGI8 Renesas Electronics Corporation	1	FIFO, 256X9, 15ns, Asynchronous, CMOS, PDSO56		7280L15PAGI8	3D model not available Symbol and footprint not available 0	0 Build or Request

	7280L15PA8 Integrated Device Technology Inc	1	FIFO, 256X9, 15ns, Asynchronous, CMOS, PDSO56		7280L15PA8	3D model not available Symbol and footprint not available 0	0 Build or Request
	7280L15PAG8I Renesas Electronics Corporation	1	FIFO		7280L15PAG8I	3D model not available Symbol and footprint not available 0	0 Build or Request
	7280L20PAI Integrated Device Technology Inc	1	FIFO, 256X9, 20ns, Asynchronous, CMOS, PDSO56		7280L20PAI	3D model not available Symbol and footprint not available 0	0 Build or Request
	7280L12PAGI Renesas Electronics Corporation	1	FIFO, 256X9, 15ns, Asynchronous, CMOS, PDSO56		7280L12PAGI	3D model not available Symbol and footprint not available 0	0 Build or Request
	7280L12PAG Integrated Device Technology Inc	1	FIFO, 256X9, 12ns, Asynchronous, CMOS, PDSO56		7280L12PAG	3D model not available Symbol and footprint not available 0	0 Build or Request
	7280L15PAGI Renesas Electronics Corporation	1	FIFO, 256X9, 15ns, Asynchronous, CMOS, PDSO56		7280L15PAGI	3D model not available Symbol and footprint not available 0	0 Build or Request
	7280L12PAG8 Integrated Device Technology Inc	1	FIFO, 256X9, 12ns, Asynchronous, CMOS, PDSO56		7280L12PAG8	3D model not available Symbol and footprint not available 0	0 Build or Request
	7280L20PA8 Integrated Device Technology Inc	1	FIFO, 512X9, 20ns, Asynchronous, CMOS, PDSO56		7280L20PA8	3D model not available Symbol and footprint not available 0	0 Build or Request
	7280L20PAG8 Integrated Device Technology Inc	1	FIFO, 512X9, 20ns, Asynchronous, CMOS, PDSO56		7280L20PAG8	3D model not available Symbol and footprint not available 0	0 Build or Request
	7280L12PA8 Integrated Device Technology Inc	1	FIFO, 256X9, 12ns, Asynchronous, CMOS, PDSO56		7280L12PA8	3D model not available Symbol and footprint not available 0	0 Build or Request
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