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Image Part Number D.S Description Package Category Prices / Stock Model Action
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72821 Molex
1 Barrier Strip Terminal Block, 25A, 1 Row(s), 1 Deck(s) 72821 0 Build or Request
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72821L10PFG8 Renesas Electronics
1 The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s Quad Flat Packages 72821L10PFG8 1 Download Model
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72821 WIHA
0 72821 0 Build or Request
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72821L15TFI Renesas Electronics
1 The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s Quad Flat Packages 72821L15TFI 1 Download Model
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72821L10TF8 Renesas Electronics
1 The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s Quad Flat Packages 72821L10TF8 1 Download Model
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72821L15PFI8 Renesas Electronics
1 The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s Quad Flat Packages 72821L15PFI8 1 Download Model
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72821L25TFI8 Renesas Electronics
1 The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s Quad Flat Packages 72821L25TFI8 1 Download Model
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72821L15PF Renesas Electronics
1 The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s Quad Flat Packages 72821L15PF 1 Download Model
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72821L15TF Renesas Electronics
1 The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s Quad Flat Packages 72821L15TF 1 Download Model
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72821L25TF8 Renesas Electronics
1 The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s Quad Flat Packages 72821L25TF8 1 Download Model
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72821L15PFI Renesas Electronics
1 The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s Quad Flat Packages 72821L15PFI 1 Download Model
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72821L15TF8 Renesas Electronics
1 The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s Quad Flat Packages 72821L15TF8 1 Download Model
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72821L10TF Renesas Electronics
1 The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s Quad Flat Packages 72821L10TF 1 Download Model
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72821L15TFI8 Renesas Electronics
1 The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s Quad Flat Packages 72821L15TFI8 1 Download Model
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72821L10PF8 Renesas Electronics
1 The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s Quad Flat Packages 72821L10PF8 1 Download Model
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72821L10PF Renesas Electronics
1 The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s Quad Flat Packages 72821L10PF 1 Download Model
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72821L25TF Renesas Electronics
1 The 72821 is a 1K x 9 dual synchronous (clocked) FIFO. The device is functionally equivalent to two 72221 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each of the two FIFOs has a 9-bit input data port and a 9-bit output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. The 72821 architecture lends itself to many flexible configurations s Quad Flat Packages 72821L25TF 1 Download Model
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7447728215 Würth Elektronik
This part was updated within the past 30 days.
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1 Radial Leaded Wire Wound Inductor WE-TI Other 7447728215 1 Download Model
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768772821 Würth Elektronik
This part was updated within the past 30 days.
Set alerts for model updates on the part download page.
1 Shielded Tiny Power Inductor WE-TPC Other 768772821 1 Download Model
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72821L15PF8 Integrated Device Technology Inc
1 TQFP-64, Reel 72821L15PF8 0 Build or Request
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72821L15TFG Integrated Device Technology Inc
1 FIFO, 1KX9, 10ns, Synchronous, CMOS, PQFP64, GREEN, SLIM, TQFP-64 72821L15TFG 0 Build or Request
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72821L15TFI8 Integrated Device Technology Inc
1 TQFP-64, Reel 72821L15TFI8 0 Build or Request
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72821L10PF8 Integrated Device Technology Inc
1 TQFP-64, Reel 72821L10PF8 0 Build or Request
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72821L25TFI8 Integrated Device Technology Inc
1 TQFP-64, Reel 72821L25TFI8 0 Build or Request
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72821L25PFGI Integrated Device Technology Inc
1 FIFO, 1KX9, 15ns, Synchronous, CMOS, PQFP64, GREEN, TQFP-64 72821L25PFGI 0 Build or Request
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