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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	72825 Molex	1	Barrier Strip Terminal Block		72825	3D model not available Symbol and footprint not available 0	0 Build or Request
	72825LB10PFG Renesas Electronics	1	The 72825 is a 1K x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72225 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for	Quad Flat Packages	72825LB10PFG	3D model available Symbol and footprint available 3	1 Download Model
	72825LB10PFG8 Renesas Electronics	1	The 72825 is a 1K x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72225 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for	Quad Flat Packages	72825LB10PFG8	3D model available Symbol and footprint available 3	1 Download Model
	72825LB15PFGI Renesas Electronics	1	The 72825 is a 1K x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72225 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for	Quad Flat Packages	72825LB15PFGI	3D model available Symbol and footprint available 3	1 Download Model

	72825LB15BGG Renesas Electronics	1	The 72825 is a 1K x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72225 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for	BGA	72825LB15BGG	3D model available Symbol and footprint available 3	1 Download Model
	72825LB15PFGI8 Renesas Electronics	1	The 72825 is a 1K x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72225 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for	Quad Flat Packages	72825LB15PFGI8	3D model available Symbol and footprint available 3	1 Download Model
	72825LB10PF8 Renesas Electronics	1	The 72825 is a 1K x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72225 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for	Quad Flat Packages	72825LB10PF8	3D model available Symbol and footprint available 3	1 Download Model
	72825LB15PF8 Renesas Electronics	1	The 72825 is a 1K x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72225 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for	Quad Flat Packages	72825LB15PF8	3D model available Symbol and footprint available 3	1 Download Model
	72825LB15PFI Renesas Electronics	1	The 72825 is a 1K x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72225 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for	Quad Flat Packages	72825LB15PFI	3D model available Symbol and footprint available 3	1 Download Model
	72825LB10PF Renesas Electronics	1	The 72825 is a 1K x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72225 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for	Quad Flat Packages	72825LB10PF	3D model available Symbol and footprint available 3	1 Download Model
	72825LB15PF Renesas Electronics	1	The 72825 is a 1K x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72225 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for	Quad Flat Packages	72825LB15PF	3D model available Symbol and footprint available 3	1 Download Model
	72825LB25PF Renesas Electronics	1	The 72825 is a 1K x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72225 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for	Quad Flat Packages	72825LB25PF	3D model available Symbol and footprint available 3	1 Download Model
	72825LB25PF8 Renesas Electronics	1	The 72825 is a 1K x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72225 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for	Quad Flat Packages	72825LB25PF8	3D model available Symbol and footprint available 3	1 Download Model
	72825LB15PFI8 Renesas Electronics	1	The 72825 is a 1K x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72225 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for	Quad Flat Packages	72825LB15PFI8	3D model available Symbol and footprint available 3	1 Download Model
	72825LB15PFGI8 Integrated Device Technology Inc	1	FIFO, 1KX18, 10ns, Synchronous, CMOS, PQFP128		72825LB15PFGI8	3D model not available Symbol and footprint not available 0	0 Build or Request

	72825LB25PFG8 Renesas Electronics Corporation	1	FIFO, 1KX18, 15ns, Synchronous, CMOS, PQFP128		72825LB25PFG8	3D model not available Symbol and footprint not available 0	0 Build or Request
	72825LB15BG Renesas Electronics Corporation	1	FIFO, 1KX18, 10ns, Synchronous, CMOS, PBGA121		72825LB15BG	3D model not available Symbol and footprint not available 0	0 Build or Request
	72825LB25BG Renesas Electronics Corporation	1	Bi-Directional FIFO, 1KX18, 15ns, Synchronous, CMOS, PBGA121		72825LB25BG	3D model not available Symbol and footprint not available 0	0 Build or Request
	72825LB10PFG Integrated Device Technology Inc	1	FIFO, 1KX18, 6.5ns, Synchronous, CMOS, PQFP128		72825LB10PFG	3D model not available Symbol and footprint not available 0	0 Build or Request
	72825LB15PFI9 Integrated Device Technology Inc	1	Bi-Directional FIFO, 1KX18, 10ns, Synchronous, CMOS, PQFP128		72825LB15PFI9	3D model not available Symbol and footprint not available 0	0 Build or Request
	72825LB15BGGI8 Integrated Device Technology Inc	1	FIFO, 1KX18, 10ns, Synchronous, CMOS, PBGA121		72825LB15BGGI8	3D model not available Symbol and footprint not available 0	0 Build or Request
	72825LB10PFG8 Integrated Device Technology Inc	1	FIFO, 1KX18, 6.5ns, Synchronous, CMOS, PQFP128		72825LB10PFG8	3D model not available Symbol and footprint not available 0	0 Build or Request
	72825LB20BGG Integrated Device Technology Inc	1	FIFO, 1KX18, 6.5ns, Synchronous, CMOS, PBGA121		72825LB20BGG	3D model not available Symbol and footprint not available 0	0 Build or Request
	72825LB15BGGI8 Renesas Electronics Corporation	1	FIFO, 1KX18, 10ns, Synchronous, CMOS, PBGA121		72825LB15BGGI8	3D model not available Symbol and footprint not available 0	0 Build or Request
	72825LBLB10PF Renesas Electronics Corporation	1	Bi-Directional FIFO, 2KX18, 6.5ns, Synchronous, CMOS, PQFP128		72825LBLB10PF	3D model not available Symbol and footprint not available 0	0 Build or Request
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