74LVC3G17DP,125 Model Download Search Results
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74LVC3G17DP,125
Nexperia
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1 | 74LVC3G17 - Triple non-inverting Schmitt trigger with 5 V tolerant input@en-us | Small Outline Packages | 74LVC3G17DP,125 |
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74LVC3G17DP,125
NXP Semiconductors
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1 | Buffer, LVC/LCX/Z Series, 3-Func, 1-Input, CMOS, PDSO8 | 74LVC3G17DP,125 |
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![Part Image](["https://assets.nexperia.com/documents/outline-3d/sot505-2_3d.png","https://assets.nexperia.com/documents/outline-3d/sot505-2_3d.png","//content.supplyframe.com/images/process/fit-in/100x100/p/229119436_sot505-2_3d.png"])
![Part Image]([null,null,"//content.supplyframe.com/images/process/fit-in/100x100/p/2245_sot505-2_3d.gif"])
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