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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	9DB106BGILF Renesas Electronics	1	The 9DB106 zero-delay buffer supports PCIe Gen1 and Gen2 clocking requirements. The 9DB106 is driven by a differential SRC output pair from an IDT CK410/CK505-compliant main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (CLKREQ#) pins make the 9DB106 suitable for Express Card applications.	Small Outline Packages	9DB106BGILF	3D model available Symbol and footprint available 3	1 Download Model
	9DB106BGILF Integrated Device Technology Inc	1	PLL Based Clock Driver, 9DB Series, 6 True Output(s), 0 Inverted Output(s), PDSO28		9DB106BGILF	3D model not available Symbol and footprint not available 0	0 Build or Request
	9DB106BGILFT Renesas Electronics	1	The 9DB106 zero-delay buffer supports PCIe Gen1 and Gen2 clocking requirements. The 9DB106 is driven by a differential SRC output pair from an IDT CK410/CK505-compliant main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (CLKREQ#) pins make the 9DB106 suitable for Express Card applications.	Small Outline Packages	9DB106BGILFT	3D model available Symbol and footprint available 3	1 Download Model
	9DB106BGILFT Integrated Device Technology Inc	1	PLL Based Clock Driver, 9DB Series, 6 True Output(s), 0 Inverted Output(s), PDSO28		9DB106BGILFT	3D model not available Symbol and footprint not available 0	0 Build or Request

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