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Image	Part Number	D.S	Description	Package Category	Prices / Stock	Model	Action
	QMB-09B-03 Jiangsu Huaneng Elec	1	Magnetic NO 2700Hz 3V 2 ~ 5V Φ9mm 9*5.5mm Buzzers	Other	QMB-09B-03	3D model available Symbol and footprint available 3	1 Download Model
	W631GU8MB09K Winbond	1	SDRAM - DDR3L Memory IC 1Gbit Parallel 800 MHz 20 ns 78-VFBGA (10.5x8)	BGA	W631GU8MB09K	3D model available Symbol and footprint available 3	1 Download Model
	W632GU8MB09W Winbond	1	BGA78	BGA	W632GU8MB09W	3D model available Symbol and footprint available 3	1 Download Model
	W632GG8MB09S Winbond	1	SDRAM - DDR3 Memory IC 2Gbit Parallel 800 MHz 20 ns 78-VFBGA (10.5x8)	BGA	W632GG8MB09S	3D model available Symbol and footprint available 3	1 Download Model

	W631GU6MB09W Winbond	1	 Power Supply: 1.35V (typ.), VDD, VDDQ = 1.283V to 1.45V Backward compatible to VDD, VDDQ = 1.5V ± 0.075V Double Data Rate architecture: two data transfers per clock cycle Eight internal banks for concurrent operation 8 bit prefetch architecture CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13 and 14 Burst length 8 (BL8) and burst chop 4 (BC4) modes: fixed via mode register (MRS) or selectable OnThe-Fly (OTF) Programmable read burst ordering: interleaved or nibble sequential Bi-directional, d	BGA	W631GU6MB09W	3D model available Symbol and footprint available 3	1 Download Model
	W632GG8MB09A Winbond	1	SDRAM - DDR3 Memory IC 2Gbit Parallel 800 MHz 20 ns 78-VFBGA (10.5x8)	BGA	W632GG8MB09A	3D model available Symbol and footprint available 3	1 Download Model
	W632GG6MB09W Winbond	1	 Refresh, Self-Refresh, Auto Self-refresh (ASR) and Partial array self refresh (PASR) Precharged Power Down and Active Power Down Data masks (DM) for write data Programmable CAS Write Latency (CWL) per operating frequency Write Latency WL = AL + CWL Multi purpose register (MPR) for readout a predefined system timing calibration bit sequence System level timing calibration support via write leveling and MPR read pattern ZQ Calibration for output driver and ODT using external reference r	BGA	W632GG6MB09W	3D model available Symbol and footprint available 3	1 Download Model
	W631GU6MB09S Winbond	1	 Power Supply: 1.35V (typ.), VDD, VDDQ = 1.283V to 1.45V Backward compatible to VDD, VDDQ = 1.5V ± 0.075V Double Data Rate architecture: two data transfers per clock cycle Eight internal banks for concurrent operation 8 bit prefetch architecture CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13 and 14 Burst length 8 (BL8) and burst chop 4 (BC4) modes: fixed via mode register (MRS) or selectable OnThe-Fly (OTF) Programmable read burst ordering: interleaved or nibble sequential Bi-directional, d	BGA	W631GU6MB09S	3D model available Symbol and footprint available 3	1 Download Model
	W631GG8MB09A Winbond	1	 Power Supply: VDD, VDDQ = 1.5V ± 0.075V Double Data Rate architecture: two data transfers per clock cycle Eight internal banks for concurrent operation 8 bit prefetch architecture CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13 and 14 Burst length 8 (BL8) and burst chop 4 (BC4) modes: fixed via mode register (MRS) or selectable OnThe-Fly (OTF) Programmable read burst ordering: interleaved or nibble sequential Bi-directional, differential data strobes (DQS and DQS#) are transmitted / received w	BGA	W631GG8MB09A	3D model available Symbol and footprint available 3	1 Download Model
	W631GG6MB09W Winbond	1	 Power Supply: VDD, VDDQ = 1.5V ± 0.075V Double Data Rate architecture: two data transfers per clock cycle Eight internal banks for concurrent operation 8 bit prefetch architecture CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13 and 14 Burst length 8 (BL8) and burst chop 4 (BC4) modes: fixed via mode register (MRS) or selectable OnThe-Fly (OTF) Programmable read burst ordering: interleaved or nibble sequential Bi-directional, differential data strobes (DQS and DQS#) are transmitted / received w	BGA	W631GG6MB09W	3D model available Symbol and footprint available 3	1 Download Model
	W632GG6MB09K Winbond	1	2Gb DDR3 SDRAM 2133MHz VFBGA96	BGA	W632GG6MB09K	3D model available Symbol and footprint available 3	1 Download Model
	W632GG8MB09W Winbond	1	SDRAM - DDR3 Memory IC 2Gbit Parallel 800 MHz 20 ns 78-VFBGA (10.5x8)	BGA	W632GG8MB09W	3D model available Symbol and footprint available 3	1 Download Model
	W632GU8MB09K Winbond	1	VFBGA - 78	BGA	W632GU8MB09K	3D model available Symbol and footprint available 3	1 Download Model
	W631GG8MB09S Winbond	1	 Power Supply: VDD, VDDQ = 1.5V ± 0.075V Double Data Rate architecture: two data transfers per clock cycle Eight internal banks for concurrent operation 8 bit prefetch architecture CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13 and 14 Burst length 8 (BL8) and burst chop 4 (BC4) modes: fixed via mode register (MRS) or selectable OnThe-Fly (OTF) Programmable read burst ordering: interleaved or nibble sequential Bi-directional, differential data strobes (DQS and DQS#) are transmitted / received w	BGA	W631GG8MB09S	3D model available Symbol and footprint available 3	1 Download Model
	W631GU8MB09A Winbond	1	 Power Supply: 1.35V (typ.), VDD, VDDQ = 1.283V to 1.45V Backward compatible to VDD, VDDQ = 1.5V ± 0.075V Double Data Rate architecture: two data transfers per clock cycle Eight internal banks for concurrent operation 8 bit prefetch architecture CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13 and 14 Burst length 8 (BL8) and burst chop 4 (BC4) modes: fixed via mode register (MRS) or selectable OnThe-Fly (OTF) Programmable read burst ordering: interleaved or nibble sequential Bi-directional, d	BGA	W631GU8MB09A	3D model available Symbol and footprint available 3	1 Download Model

	W631GG8MB09W Winbond	1	 Power Supply: VDD, VDDQ = 1.5V ± 0.075V Double Data Rate architecture: two data transfers per clock cycle Eight internal banks for concurrent operation 8 bit prefetch architecture CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13 and 14 Burst length 8 (BL8) and burst chop 4 (BC4) modes: fixed via mode register (MRS) or selectable OnThe-Fly (OTF) Programmable read burst ordering: interleaved or nibble sequential Bi-directional, differential data strobes (DQS and DQS#) are transmitted / received w	BGA	W631GG8MB09W	3D model available Symbol and footprint available 3	1 Download Model
	W631GG6MB09S Winbond	1	 Power Supply: VDD, VDDQ = 1.5V ± 0.075V Double Data Rate architecture: two data transfers per clock cycle Eight internal banks for concurrent operation 8 bit prefetch architecture CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13 and 14 Burst length 8 (BL8) and burst chop 4 (BC4) modes: fixed via mode register (MRS) or selectable OnThe-Fly (OTF) Programmable read burst ordering: interleaved or nibble sequential Bi-directional, differential data strobes (DQS and DQS#) are transmitted / received w	BGA	W631GG6MB09S	3D model available Symbol and footprint available 3	1 Download Model
	W631GU6MB09A Winbond	1	 Power Supply: 1.35V (typ.), VDD, VDDQ = 1.283V to 1.45V Backward compatible to VDD, VDDQ = 1.5V ± 0.075V Double Data Rate architecture: two data transfers per clock cycle Eight internal banks for concurrent operation 8 bit prefetch architecture CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13 and 14 Burst length 8 (BL8) and burst chop 4 (BC4) modes: fixed via mode register (MRS) or selectable OnThe-Fly (OTF) Programmable read burst ordering: interleaved or nibble sequential Bi-directional, d	BGA	W631GU6MB09A	3D model available Symbol and footprint available 3	1 Download Model
	W631GU8MB09W Winbond	1	SDRAM - DDR3L Memory IC 1Gbit Parallel 800 MHz 20 ns 78-VFBGA (10.5x8)	BGA	W631GU8MB09W	3D model available Symbol and footprint available 3	1 Download Model
	W632GG6MB09A Winbond	1	2Gb DDR3 SDRAM 2133MHz VFBGA96	BGA	W632GG6MB09A	3D model available Symbol and footprint available 3	1 Download Model
	W632GU6MB09K Winbond	1	2Gb DDR3 SDRAM 2133MHz VFBGA96	BGA	W632GU6MB09K	3D model available Symbol and footprint available 3	1 Download Model
	W631GG8MB09K Winbond	1	 Power Supply: VDD, VDDQ = 1.5V ± 0.075V Double Data Rate architecture: two data transfers per clock cycle Eight internal banks for concurrent operation 8 bit prefetch architecture CAS Latency: 5, 6, 7, 8, 9, 10, 11, 13 and 14 Burst length 8 (BL8) and burst chop 4 (BC4) modes: fixed via mode register (MRS) or selectable OnThe-Fly (OTF) Programmable read burst ordering: interleaved or nibble sequential Bi-directional, differential data strobes (DQS and DQS#) are transmitted / received w	BGA	W631GG8MB09K	3D model available Symbol and footprint available 3	1 Download Model
	W632GU6MB09S Winbond	1	2Gb DDR3 SDRAM 2133MHz VFBGA96	BGA	W632GU6MB09S	3D model available Symbol and footprint available 3	1 Download Model
	W632GU8MB09S Winbond	1	VFBGA - 78	BGA	W632GU8MB09S	3D model available Symbol and footprint available 3	1 Download Model
	W632GU8MB09A Winbond	1	BGA78	BGA	W632GU8MB09A	3D model available Symbol and footprint available 3	1 Download Model
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