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AUIRF3805S-7P - Infineon

Description: 55V, N-Ch, 2.6 mΩ max, Automotive MOSFET, D2PAK 7pin, Gen 10.2

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PCB Footprints
AUIRF3805S-7P - Infineon PCB footprint - Other - Other - PG-TO263-7-900_2021
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AUIRF3805S-7P Details

  • Manufacturer Part Number:

    AUIRF3805S-7P

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • Package Description:

    D2PAK-7

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    4 Weeks

  • Manufacturer:

    Infineon Technologies AG

  • YTEOL:

    0

  • Additional Feature:

    AVALANCHE RATED, ULTRA-LOW RESISTANCE

  • Avalanche Energy Rating (Eas):

    680 mJ

  • Case Connection:

    DRAIN

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    55 V

  • Drain Current-Max (ID):

    160 A

  • Drain-source On Resistance-Max:

    0.0026 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • JESD-30 Code:

    R-PSSO-G6

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    6

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    175 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    300 W

  • Pulsed Drain Current-Max (IDM):

    1000 A

  • Qualification Status:

    Not Qualified

  • Surface Mount:

    YES

  • Terminal Finish:

    Matte Tin (Sn) - with Nickel (Ni) barrier

  • Terminal Form:

    GULL WING

  • Terminal Position:

    SINGLE

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

AUIRF3805S-7P Frequently Asked Questions (FAQs)

  • The maximum operating temperature range for the AUIRF3805S-7P is -40°C to 150°C.
  • To ensure reliability, it's essential to follow proper thermal management practices, such as providing adequate heat sinking, using thermal interface materials, and minimizing thermal resistance.
  • Infineon provides a recommended PCB layout and thermal design guide in their application notes. It's essential to follow these guidelines to ensure optimal performance and reliability.
  • To protect the AUIRF3805S-7P from ESD, handle the device in an ESD-protected environment, use ESD-protective packaging, and follow proper handling and storage procedures.
  • Follow the recommended soldering and assembly procedures outlined in the Infineon application notes and industry standards, such as IPC-J-STD-001, to ensure reliable assembly and minimize defects.

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AUIRF3805S-7P Overview

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