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EP2C20F256I8 - Intel

Description: FPGA - Field Programmable Gate Array FPGA - Cyclone II 1172 LABs 152 IOs

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PCB Footprints
EP2C20F256I8 - Intel PCB footprint - BGA - BGA - 256-Pin FineLine Ball-Grid Array (FBGA), Option 2—Thin—Wire Bond
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3D Models
EP2C20F256I8 - Intel  - 3D model - BGA - 256-Pin FineLine Ball-Grid Array (FBGA), Option 2—Thin—Wire Bond
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EP2C20F256I8 Details

  • Manufacturer Part Number:

    EP2C20F256I8

  • Part Life Cycle Code:

    Transferred

  • Package Description:

    FBGA-256

  • Country Of Origin:

    Mainland China, Malaysia, Taiwan, USA, Vietnam

  • ECCN Code:

    EAR99

  • HTS Code:

    8542.39.00.01

  • Manufacturer:

    Intel Corporation

  • YTEOL:

    8

  • Additional Feature:

    ALSO REQUIRES 3.3 SUPPLY

  • Clock Frequency-Max:

    402.5 MHz

  • JESD-30 Code:

    S-PBGA-B256

  • JESD-609 Code:

    e0

  • Length:

    17 mm

  • Moisture Sensitivity Level:

    3

  • Number of CLBs:

    1172

  • Number of Inputs:

    152

  • Number of Logic Cells:

    18752

  • Number of Outputs:

    136

  • Number of Terminals:

    256

  • Operating Temperature-Max:

    100 °C

  • Operating Temperature-Min:

    -40 °C

  • Organization:

    1172 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    LBGA

  • Package Equivalence Code:

    BGA256,16X16,40

  • Package Shape:

    SQUARE

  • Package Style:

    GRID ARRAY, LOW PROFILE

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    1.55 mm

  • Supply Voltage-Max:

    1.25 V

  • Supply Voltage-Min:

    1.15 V

  • Supply Voltage-Nom:

    1.2 V

  • Surface Mount:

    YES

  • Technology:

    CMOS, 90 nm

  • Terminal Finish:

    Tin/Lead (Sn/Pb)

  • Terminal Form:

    BALL

  • Terminal Pitch:

    1 mm

  • Terminal Position:

    BOTTOM

  • Width:

    17 mm

EP2C20F256I8 Frequently Asked Questions (FAQs)

  • The maximum operating temperature range for the EP2C20F256I8 is -40°C to 100°C.
  • To implement a CDC in the EP2C20F256I8, use a synchronizer circuit or a FIFO-based CDC to ensure data integrity and prevent metastability issues.
  • The maximum frequency supported by the EP2C20F256I8 is 250 MHz.
  • To optimize power consumption in the EP2C20F256I8, use power-aware design techniques such as clock gating, voltage scaling, and dynamic voltage and frequency scaling.
  • The maximum current rating for the EP2C20F256I8 is 1.5 A.

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EP2C20F256I8 Overview

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EP2C20F256I8 Alternates

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Image Part Number Model
Part Image EP2C20F256C8N Altera Corporation

Field Programmable Gate Array, 1172 CLBs, 402.5MHz, 18752-Cell, CMOS, PBGA256

Part Image EP2C20F256I8N Altera Corporation

Field Programmable Gate Array, 1172 CLBs, 402.5MHz, 18752-Cell, CMOS, PBGA256

Part Image EP2C20F256C8N Intel Corporation

Field Programmable Gate Array, 1172 CLBs, 402.5MHz, 18752-Cell, CMOS, PBGA256

Part Image EP2C20F256I8N Intel Corporation

Field Programmable Gate Array, 1172 CLBs, 402.5MHz, 18752-Cell, CMOS, PBGA256