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FDMC610P - onsemi

Description: Max rDS(on) = 6.4 mΩ at VGS = -2.5 V, ID = -16 A; Lower output capacitance, gate resistance, and gate charge boost efficiency; RoHS Compliant; Max rDS(on) = 3.9 mΩ at VGS = -4.5 V, ID = -22 A; State-of-the-art switching performance; Shielded gate technology reduces switch node ringing and increases immunity to EMI and cross conduction

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PCB Footprints
FDMC610P - onsemi PCB footprint - Other - Other - POWER-33
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3D Models
FDMC610P - onsemi  - 3D model - Other - POWER-33
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FDMC610P Details

  • Manufacturer Part Number:

    FDMC610P

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    PQFN-8

  • Package Description:

    ROHS COMPLIANT, POWER 33, 8 PIN

  • Manufacturer Package Code:

    483AK

  • Country Of Origin:

    Philippines

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    21 Weeks

  • Manufacturer:

    onsemi

  • YTEOL:

    5.3

  • Case Connection:

    DRAIN

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    12 V

  • Drain Current-Max (ID):

    22 A

  • Drain-source On Resistance-Max:

    0.0039 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • JEDEC-95 Code:

    MO-240BA

  • JESD-30 Code:

    S-PDSO-N5

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    5

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    150 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    SQUARE

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    P-CHANNEL

  • Power Dissipation-Max (Abs):

    48 W

  • Pulsed Drain Current-Max (IDM):

    200 A

  • Surface Mount:

    YES

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    NO LEAD

  • Terminal Position:

    DUAL

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

FDMC610P Frequently Asked Questions (FAQs)

  • A 2-layer or 4-layer PCB with a solid ground plane and thermal vias is recommended. The device should be placed near a thermal pad or heat sink to dissipate heat efficiently.
  • Ensure proper heat sinking, use a thermal interface material (TIM) between the device and heat sink, and follow the recommended PCB layout guidelines. Also, consider derating the device's power handling at high temperatures.
  • The maximum allowed voltage on the gate driver output is 15V, but it's recommended to keep it below 12V to ensure reliable operation and minimize electromagnetic interference (EMI).
  • Yes, the FDMC610P can be used in a half-bridge configuration, but ensure that the bootstrap capacitor is properly sized and the dead time is set correctly to prevent shoot-through currents.
  • Use a shielded cable for the gate driver output, keep the PCB layout compact, and use a common mode choke or ferrite bead to filter the output. Also, ensure proper grounding and decoupling of the device.

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FDMC610P Overview

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