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FM28V100-TG - Infineon

Description: FM28V100-TG Parallel FRAM Memory, 1Mbit, 60ns, 2 → 3.6 V 32-Pin TSOP

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FM28V100-TG - Infineon PCB footprint - Small Outline Packages - Small Outline Packages - FM28V100-TG
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FM28V100-TG Details

  • Manufacturer Part Number:

    FM28V100-TG

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Country Of Origin:

    Mainland China, Taiwan

  • Manufacturer:

    Infineon Technologies AG

  • YTEOL:

    4.9

  • Access Time-Max:

    105 ns

  • Additional Feature:

    2kv ESD available

  • Data Retention Time-Min:

    10

  • Endurance:

    100000000000000 Write/Erase Cycles

  • JESD-30 Code:

    R-PDSO-G32

  • JESD-609 Code:

    e3

  • Length:

    11.8 mm

  • Memory Density:

    1048576 bit

  • Memory IC Type:

    FRAM

  • Memory Width:

    8

  • Moisture Sensitivity Level:

    3

  • Number of Functions:

    1

  • Number of Terminals:

    32

  • Number of Words:

    131072 words

  • Number of Words Code:

    128000

  • Operating Mode:

    ASYNCHRONOUS

  • Operating Temperature-Max:

    85 °C

  • Operating Temperature-Min:

    -40 °C

  • Organization:

    128KX8

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    TSOP1

  • Package Equivalence Code:

    TSSOP32,.53,20

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE, THIN PROFILE

  • Parallel/Serial:

    PARALLEL

  • Peak Reflow Temperature (Cel):

    260

  • Seated Height-Max:

    1.2 mm

  • Standby Current-Max:

    0.00015 A

  • Standby Voltage-Min:

    2 V

  • Supply Current-Max:

    0.012 mA

  • Supply Voltage-Max (Vsup):

    3.6 V

  • Supply Voltage-Min (Vsup):

    2 V

  • Supply Voltage-Nom (Vsup):

    3.3 V

  • Surface Mount:

    YES

  • Technology:

    CMOS

  • Terminal Finish:

    Pure Tin (Sn)

  • Terminal Form:

    GULL WING

  • Terminal Pitch:

    0.5 mm

  • Terminal Position:

    DUAL

  • Width:

    8 mm

FM28V100-TG Frequently Asked Questions (FAQs)

  • A 4-layer PCB with a solid ground plane and a separate power plane is recommended. The FM28V100-TG should be placed near the center of the board, and the decoupling capacitors should be placed as close as possible to the device.
  • To ensure reliable communication, make sure to use a common clock signal, use a pull-up resistor on the CS pin, and ensure that the slave devices are properly configured and synchronized with the master device.
  • The maximum operating frequency of the FM28V100-TG is 40 MHz, but it can be overclocked to 50 MHz with proper PCB design and signal integrity considerations.
  • The FM28V100-TG has built-in error detection and correction mechanisms, such as ECC and CRC. Implement a robust error handling mechanism in your firmware to detect and recover from errors, and use the device's interrupt capabilities to handle exceptions.
  • The recommended power-up sequence is to apply VCC first, followed by VPP, and then the clock signal. During power-down, the sequence should be reversed. Ensure that the power supply is stable and within the recommended voltage range.

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FM28V100-TG Overview

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