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HSMG-C170 - Avago Technologies

Description: Green LED, 15 mcd 170 , 2-pin 0805 SMD Package

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HSMG-C170 - Avago Technologies PCB footprint - LEDs Chip - LEDs Chip - HSMx-C170
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HSMG-C170 - Avago Technologies  - 3D model - LEDs Chip - HSMx-C170
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HSMG-C170 Details

  • Manufacturer Part Number:

    HSMG-C170

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    2 X 1.25 MM, 0.80 MM HEIGHT, LEAD FREE, PLASTIC PACKAGE-2

  • Reach Compliance Code:

    Compliant

  • Country Of Origin:

    Mainland China, Taiwan

  • ECCN Code:

    EAR99

  • HTS Code:

    8541.40.20.00

  • Manufacturer:

    Avago Technologies

  • YTEOL:

    7

  • Additional Feature:

    SUPPORTS INFRARED

  • Color:

    GREEN

  • Color@Wavelength:

    Green

  • Configuration:

    SINGLE

  • Forward Current-Max:

    0.02 A

  • Forward Voltage-Max:

    2.6 V

  • JESD-609 Code:

    e4

  • Lens Type:

    UNTINTED DIFFUSED

  • Luminous Intensity-Min:

    0.0045 cd

  • Luminous Intensity-Nom:

    15.0 mcd

  • Mounting Feature:

    SURFACE MOUNT

  • Number of Functions:

    1

  • Number of Terminals:

    2

  • Operating Temperature-Max:

    85 °C

  • Operating Temperature-Min:

    -40 °C

  • Optoelectronic Device Type:

    SINGLE COLOR LED

  • Overall Height:

    0.8 mm

  • Packing Method:

    TR, 7 INCH

  • Peak Wavelength:

    570 nm

  • Reverse Voltage-Max:

    5 V

  • Shape:

    RECTANGULAR

  • Size:

    1.4 mm

  • Surface Mount:

    YES

  • Terminal Finish:

    Gold (Au) - with Nickel (Ni) barrier

  • Terminal Pitch:

    1.6 mm

  • Viewing Angle:

    170 deg

HSMG-C170 Frequently Asked Questions (FAQs)

  • Broadcom recommends a 4-layer PCB with a solid ground plane, and thermal vias under the device to dissipate heat. A thermal pad on the bottom of the package should be connected to a heat sink or a thermal pad on the PCB.
  • Use a 100-ohm differential impedance for high-speed signals, and add series termination resistors to reduce reflections. Also, use a common mode filter or a Pi-filter to reduce EMI emissions.
  • Power up the device in the following sequence: VCC, then AVCC, then DVCC. The voltage ramp rate should be 1-2 ms/V to prevent latch-up and ensure reliable operation.
  • Use the power management registers to configure the device for low power mode. Disable unused blocks, reduce clock frequencies, and use dynamic voltage and frequency scaling to minimize power consumption.
  • Use the PLL to generate a stable clock frequency. Set the PLL loop bandwidth to 100 kHz, and the PLL gain to 10. Use the clocking system to generate a 100 MHz clock frequency for the CPU and peripherals.

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HSMG-C170 Overview

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