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NTD3055L104G - onsemi

Description: Obsolete - Single N-Channel Logic Level Power MOSFET 60V, 9A, 170mΩ

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NTD3055L104G - onsemi PCB footprint - Other - Other - DPAK CASE 369C STYLE 2
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NTD3055L104G Details

  • Manufacturer Part Number:

    NTD3055L104G

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Obsolete

  • Part Package Code:

    DPAK (SINGLE GAUGE) TO-252

  • Pin Count:

    3

  • Manufacturer Package Code:

    369C

  • ECCN Code:

    EAR99

  • Manufacturer:

    onsemi

  • YTEOL:

    0

  • Avalanche Energy Rating (Eas):

    61 mJ

  • Case Connection:

    DRAIN

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • DS Breakdown Voltage-Min:

    60 V

  • Drain Current-Max (ID):

    12 A

  • Drain-source On Resistance-Max:

    0.104 Ω

  • FET Technology:

    METAL-OXIDE SEMICONDUCTOR

  • JESD-30 Code:

    R-PSSO-G2

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    2

  • Operating Mode:

    ENHANCEMENT MODE

  • Operating Temperature-Max:

    175 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    48 W

  • Pulsed Drain Current-Max (IDM):

    45 A

  • Qualification Status:

    Not Qualified

  • Surface Mount:

    YES

  • Terminal Finish:

    Tin (Sn)

  • Terminal Form:

    GULL WING

  • Terminal Position:

    SINGLE

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Transistor Application:

    SWITCHING

  • Transistor Element Material:

    SILICON

NTD3055L104G Frequently Asked Questions (FAQs)

  • A thermal pad on the bottom of the package should be connected to a large copper area on the PCB to dissipate heat. Multiple vias can be used to connect the thermal pad to an inner layer or the backside of the PCB for better heat dissipation.
  • The device requires a stable voltage supply and a proper biasing circuit to ensure optimal performance. A voltage regulator can be used to regulate the supply voltage, and a bias resistor can be used to set the gate-source voltage.
  • The device is sensitive to electrostatic discharge (ESD) and can be damaged by excessive voltage or current. Handle the device with an ESD wrist strap or mat, and avoid touching the pins or leads. Use a soldering iron with a temperature-controlled tip to prevent overheating.
  • The maximum power dissipation of the device can be determined by calculating the product of the maximum current and voltage ratings. The device's thermal resistance (RθJA) and the maximum junction temperature (Tj) should also be considered to ensure the device operates within its safe operating area.
  • When paralleling multiple devices, ensure that each device has its own gate resistor and that the gate-source voltage is properly set. The devices should be matched for optimal performance, and the PCB layout should be designed to minimize inductance and ensure good thermal dissipation.

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NTD3055L104G Overview

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