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SLG46827-AG - Renesas Electronics

Description: The SLG46827-A provides a small, low power component for commonly used mixed-signal functions. The user creates the circuit design by programming the multiple time Non-Volatile Memory (NVM) to configure the interconnect logic, the IOs and the macrocells of the SLG46826. This highly versatile device allows a wide variety of mixed-signal functions to be designed within a very small, low power single integrated circuit.

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SLG46827-AG - Renesas Electronics PCB footprint - Small Outline Packages - Small Outline Packages - 20-pin TSSOP
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SLG46827-AG Details

  • Manufacturer Part Number:

    SLG46827-AG

  • Brand Name:

    Renesas

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    TSSOP

  • Pin Count:

    20

  • Country Of Origin:

    Taiwan

  • HTS Code:

    8542.31.00.55

  • Factory Lead Time:

    18 Weeks

  • Manufacturer:

    Renesas Electronics Corporation

  • YTEOL:

    7

  • Architecture:

    PLA-TYPE

  • In-System Programmable:

    NO

  • JESD-30 Code:

    R-PDSO-G20

  • JTAG BST:

    NO

  • Length:

    6.5 mm

  • Moisture Sensitivity Level:

    1

  • Number of I/O Lines:

    13

  • Number of Inputs:

    13

  • Number of Macro Cells:

    19

  • Number of Outputs:

    15

  • Number of Terminals:

    20

  • Operating Temperature-Max:

    105 °C

  • Operating Temperature-Min:

    -40 °C

  • Organization:

    0 DEDICATED INPUTS, 13 I/O

  • Output Function:

    MACROCELL

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    TSSOP

  • Package Equivalence Code:

    TSSOP20,.25

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE, THIN PROFILE, SHRINK PITCH

  • Programmable Logic Type:

    OT PLD

  • Screening Level:

    AEC-Q100

  • Seated Height-Max:

    1.2 mm

  • Supply Voltage-Max:

    5.5 V

  • Supply Voltage-Min:

    2.3 V

  • Supply Voltage-Nom:

    3.3 V

  • Surface Mount:

    YES

  • Terminal Form:

    GULL WING

  • Terminal Pitch:

    0.65 mm

  • Terminal Position:

    DUAL

  • Width:

    4.4 mm

SLG46827-AG Frequently Asked Questions (FAQs)

  • Renesas provides a recommended PCB layout guide in their application note (AN-1154) for the SLG46827-AG. It's essential to follow this guide to ensure optimal performance, minimize noise, and reduce electromagnetic interference (EMI).
  • To achieve the best clock accuracy, it's recommended to use an external crystal oscillator (XO) instead of the internal oscillator. However, if you must use the internal oscillator, ensure that the VDD voltage is stable, and the temperature range is within the specified operating range. You can also use the clock accuracy calibration feature (CALIB) to adjust the internal oscillator frequency.
  • The maximum current draw for each GPIO pin is not explicitly stated in the datasheet. However, according to Renesas' technical support, the maximum current draw for each GPIO pin is approximately 4mA. It's essential to ensure that the total current draw from all GPIO pins does not exceed the maximum total current rating of the device.
  • The SLG46827-AG has a built-in watchdog timer (WDT) that can be enabled and configured using the WDT control register. You can set the WDT timeout period, enable or disable the WDT, and configure the WDT reset behavior using the WDT control register. Refer to the datasheet and application notes for more information on implementing a WDT in your design.
  • Renesas recommends using an external power-on reset (POR) circuit to ensure a clean power-up sequence for the SLG46827-AG. A simple POR circuit can be implemented using a voltage supervisor IC (such as the TLV7031) and a few external components. Refer to the datasheet and application notes for more information on implementing a POR circuit.

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