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XC6SLX150-2CSG484I - AMD

Description: FPGA - Field Programmable Gate Array

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XC6SLX150-2CSG484I - AMD PCB footprint - BGA - BGA - CSG484 - Wire-Bond Chip-Scale BGA (0.8 mm Pitch)
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XC6SLX150-2CSG484I - AMD  - 3D model - BGA - CSG484 - Wire-Bond Chip-Scale BGA (0.8 mm Pitch)
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XC6SLX150-2CSG484I Details

  • Manufacturer Part Number:

    XC6SLX150-2CSG484I

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    19 X 19 MM, 0.80 MM PITCH, LEAD FREE, BGA-484

  • Country Of Origin:

    Taiwan

  • HTS Code:

    8542.31.00.60

  • Factory Lead Time:

    12 Weeks

  • Manufacturer:

    AMD

  • YTEOL:

    4

  • Clock Frequency-Max:

    667 MHz

  • Combinatorial Delay of a CLB-Max:

    0.26 ns

  • JESD-30 Code:

    S-PBGA-B484

  • JESD-609 Code:

    e1

  • Length:

    19 mm

  • Moisture Sensitivity Level:

    3

  • Number of CLBs:

    11519

  • Number of Inputs:

    330

  • Number of Logic Cells:

    147443

  • Number of Outputs:

    330

  • Number of Terminals:

    484

  • Operating Temperature-Max:

    100 °C

  • Operating Temperature-Min:

    -40 °C

  • Organization:

    11519 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    FBGA

  • Package Equivalence Code:

    BGA484,22X22,32

  • Package Shape:

    SQUARE

  • Package Style:

    GRID ARRAY, FINE PITCH

  • Peak Reflow Temperature (Cel):

    260

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    1.8 mm

  • Supply Voltage-Max:

    1.26 V

  • Supply Voltage-Min:

    1.14 V

  • Supply Voltage-Nom:

    1.2 V

  • Surface Mount:

    YES

  • Technology:

    CMOS, 40 nm

  • Temperature Grade:

    INDUSTRIAL

  • Terminal Finish:

    Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5)

  • Terminal Form:

    BALL

  • Terminal Pitch:

    0.8 mm

  • Terminal Position:

    BOTTOM

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Width:

    19 mm

XC6SLX150-2CSG484I Frequently Asked Questions (FAQs)

  • The maximum operating frequency of the XC6SLX150 is dependent on the specific design and implementation. However, Xilinx provides a maximum clock frequency of 450 MHz for the -2 speed grade.
  • The XC6SLX150 has dedicated DDR3 memory interface blocks. You can use the Xilinx MIG (Memory Interface Generator) tool to generate a DDR3 interface core. The tool provides a GUI-based interface to configure and generate the core.
  • The power consumption of the XC6SLX150 depends on the specific design, operating frequency, and voltage. However, Xilinx provides a power estimator tool that can estimate the power consumption based on the design requirements.
  • Yes, the XC6SLX150 is suitable for high-reliability applications. Xilinx provides a range of features and tools to support high-reliability design, including SEU (Single Event Upset) mitigation, CRC (Cyclic Redundancy Check), and built-in self-test.
  • The XC6SLX150 has a PCIe endpoint block that can be used to implement a PCIe interface. You can use the Xilinx PCIe core generator tool to generate a PCIe core. The tool provides a GUI-based interface to configure and generate the core.

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XC6SLX150-2CSG484I Overview

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Image Part Number Model
Part Image XC6SLX150-2CS484I AMD Xilinx

Field Programmable Gate Array, 667MHz, 147443-Cell, CMOS, PBGA484

Part Image XC6SLX150-2CSG484C AMD Xilinx

Field Programmable Gate Array, 11519 CLBs, 667MHz, 147443-Cell, CMOS, PBGA484

Part Image XC6SLX150-2CSG484I AMD Xilinx

Field Programmable Gate Array, 11519 CLBs, 667MHz, 147443-Cell, CMOS, PBGA484