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XC6SLX4-2CPG196I - AMD

Description: Spartan®-6 LX Field Programmable Gate Array (FPGA) IC 106 221184 3840 196-TFBGA, CSBGA

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XC6SLX4-2CPG196I Details

  • Manufacturer Part Number:

    XC6SLX4-2CPG196I

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    8 X 8 MM, 0.50 MM PITCH, LEAD FREE, BGA-196

  • Country Of Origin:

    Taiwan

  • HTS Code:

    8542.31.00.60

  • Factory Lead Time:

    12 Weeks

  • Manufacturer:

    AMD

  • YTEOL:

    4

  • Clock Frequency-Max:

    667 MHz

  • Combinatorial Delay of a CLB-Max:

    0.26 ns

  • JESD-30 Code:

    S-PBGA-B196

  • JESD-609 Code:

    e8

  • Length:

    8 mm

  • Moisture Sensitivity Level:

    3

  • Number of CLBs:

    300

  • Number of Inputs:

    100

  • Number of Logic Cells:

    3840

  • Number of Outputs:

    100

  • Number of Terminals:

    196

  • Operating Temperature-Max:

    100 °C

  • Operating Temperature-Min:

    -40 °C

  • Organization:

    300 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    TFBGA

  • Package Equivalence Code:

    BGA196,14X14,20

  • Package Shape:

    SQUARE

  • Package Style:

    GRID ARRAY, THIN PROFILE, FINE PITCH

  • Peak Reflow Temperature (Cel):

    260

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    1.1 mm

  • Supply Voltage-Max:

    1.26 V

  • Supply Voltage-Min:

    1.14 V

  • Supply Voltage-Nom:

    1.2 V

  • Surface Mount:

    YES

  • Technology:

    CMOS, 40 nm

  • Temperature Grade:

    INDUSTRIAL

  • Terminal Finish:

    Tin/Silver/Copper (Sn98.5Ag1.0Cu0.5)

  • Terminal Form:

    BALL

  • Terminal Pitch:

    0.5 mm

  • Terminal Position:

    BOTTOM

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Width:

    8 mm

XC6SLX4-2CPG196I Frequently Asked Questions (FAQs)

  • The maximum operating frequency of the XC6SLX4-2CPG196I is 350 MHz, but it depends on the specific application and design implementation.
  • You can implement a DDR3 memory interface using the MIG (Memory Interface Generator) tool provided by Xilinx, which generates a customized IP core for the FPGA.
  • The power consumption of the XC6SLX4-2CPG196I depends on the specific design and operating conditions. However, the typical power consumption is around 1.2W to 2.5W, according to the Xilinx datasheet.
  • Yes, the XC6SLX4-2CPG196I supports high-speed serial interfaces like PCIe and SATA through its high-speed transceivers, which can operate up to 6.25 Gbps.
  • You can use Xilinx's ChipScope Pro tool, which provides a set of debug and test tools, including logic analyzers, protocol analyzers, and signal generators, to debug and test your design.

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XC6SLX4-2CPG196I Overview

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Part Image XC6SLX4-2CPG196C AMD Xilinx

Field Programmable Gate Array, 300 CLBs, 667MHz, 3840-Cell, CMOS, PBGA196

Part Image XC6SLX4-2CPG196C AMD

Field Programmable Gate Array, 300 CLBs, 667MHz, 3840-Cell, CMOS, PBGA196

Part Image XC6SLX4-2CPG196I AMD Xilinx

Field Programmable Gate Array, 300 CLBs, 667MHz, 3840-Cell, CMOS, PBGA196