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XC6SLX4-2TQG144I - AMD

Description: XILINX - XC6SLX4-2TQG144I - FPGA, Spartan-6, DCM, PLL, 102 I/O's, 375 MHz, 3840 Cells, 1.14 V to 1.26 V, TQFP-144

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XC6SLX4-2TQG144I - AMD PCB footprint - Quad Flat Packages - Quad Flat Packages - TQG144
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XC6SLX4-2TQG144I - AMD  - 3D model - Quad Flat Packages - TQG144
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XC6SLX4-2TQG144I Details

  • Manufacturer Part Number:

    XC6SLX4-2TQG144I

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    20 X 20 MM, 0.50 MM PITCH, LEAD FREE, TQFP-144

  • Country Of Origin:

    Taiwan

  • HTS Code:

    8542.31.00.60

  • Factory Lead Time:

    12 Weeks

  • Manufacturer:

    AMD

  • YTEOL:

    4

  • Clock Frequency-Max:

    667 MHz

  • Combinatorial Delay of a CLB-Max:

    0.26 ns

  • JESD-30 Code:

    S-PQFP-G144

  • JESD-609 Code:

    e3

  • Length:

    20 mm

  • Moisture Sensitivity Level:

    3

  • Number of CLBs:

    300

  • Number of Inputs:

    100

  • Number of Logic Cells:

    3840

  • Number of Outputs:

    100

  • Number of Terminals:

    144

  • Operating Temperature-Max:

    100 °C

  • Operating Temperature-Min:

    -40 °C

  • Organization:

    300 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    LFQFP

  • Package Equivalence Code:

    QFP144,.87SQ,20

  • Package Shape:

    SQUARE

  • Package Style:

    FLATPACK, LOW PROFILE, FINE PITCH

  • Peak Reflow Temperature (Cel):

    260

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    1.6 mm

  • Supply Voltage-Max:

    1.26 V

  • Supply Voltage-Min:

    1.14 V

  • Supply Voltage-Nom:

    1.2 V

  • Surface Mount:

    YES

  • Technology:

    CMOS, 40 nm

  • Temperature Grade:

    INDUSTRIAL

  • Terminal Finish:

    Matte Tin (Sn)

  • Terminal Form:

    GULL WING

  • Terminal Pitch:

    0.5 mm

  • Terminal Position:

    QUAD

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Width:

    20 mm

XC6SLX4-2TQG144I Frequently Asked Questions (FAQs)

  • The maximum operating temperature range for XC6SLX4-2TQG144I is -40°C to 100°C.
  • To implement a CDC in XC6SLX4-2TQG144I, use a synchronizer circuit or a FIFO-based CDC, and ensure that the clock domains are properly isolated.
  • The maximum frequency achievable with XC6SLX4-2TQG144I depends on the design complexity and the clocking architecture. However, the FPGA can support clock frequencies up to 500 MHz.
  • To optimize power consumption in XC6SLX4-2TQG144I, use power-aware design techniques such as clock gating, voltage scaling, and dynamic voltage and frequency scaling.
  • Yes, XC6SLX4-2TQG144I is suitable for high-reliability applications, as it is designed with built-in error correction and detection mechanisms, such as ECC and CRC.

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XC6SLX4-2TQG144I Overview

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Part Image XC6SLX4-2TQG144C AMD

Field Programmable Gate Array, 300 CLBs, 667MHz, 3840-Cell, CMOS, PQFP144

Part Image XC6SLX4-2TQG144C AMD Xilinx

Field Programmable Gate Array, 300 CLBs, 667MHz, 3840-Cell, CMOS, PQFP144

Part Image XC6SLX4-2TQG144I AMD Xilinx

Field Programmable Gate Array, 300 CLBs, 667MHz, 3840-Cell, CMOS, PQFP144