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XC6SLX9-2TQG144C - AMD

Description: FPGA Spartan-6 9152 logic cells TQFP144 XC6SLX9-2TQG144C, FPGA Spartan-6 9152 Cells, 576kbit, 5720 Blocks, 144-Pin TQFP

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XC6SLX9-2TQG144C - AMD PCB footprint - Quad Flat Packages - Quad Flat Packages - TQFP (TQ144/TQG144)
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XC6SLX9-2TQG144C - AMD  - 3D model - Quad Flat Packages - TQFP (TQ144/TQG144)
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XC6SLX9-2TQG144C Details

  • Manufacturer Part Number:

    XC6SLX9-2TQG144C

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    TQFP-144

  • Country Of Origin:

    Taiwan

  • HTS Code:

    8542.31.00.60

  • Factory Lead Time:

    12 Weeks

  • Manufacturer:

    AMD

  • YTEOL:

    4

  • Clock Frequency-Max:

    667 MHz

  • Combinatorial Delay of a CLB-Max:

    0.26 ns

  • JESD-30 Code:

    S-PQFP-G144

  • JESD-609 Code:

    e3

  • Length:

    20 mm

  • Moisture Sensitivity Level:

    3

  • Number of CLBs:

    715

  • Number of Inputs:

    102

  • Number of Logic Cells:

    9152

  • Number of Outputs:

    102

  • Number of Terminals:

    144

  • Operating Temperature-Max:

    85 °C

  • Organization:

    715 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    LFQFP

  • Package Equivalence Code:

    QFP144,.87SQ,20

  • Package Shape:

    SQUARE

  • Package Style:

    FLATPACK, LOW PROFILE, FINE PITCH

  • Peak Reflow Temperature (Cel):

    260

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Qualification Status:

    Not Qualified

  • Seated Height-Max:

    1.6 mm

  • Supply Voltage-Max:

    1.26 V

  • Supply Voltage-Min:

    1.14 V

  • Supply Voltage-Nom:

    1.2 V

  • Surface Mount:

    YES

  • Technology:

    CMOS, 40 nm

  • Temperature Grade:

    OTHER

  • Terminal Finish:

    Matte Tin (Sn)

  • Terminal Form:

    GULL WING

  • Terminal Pitch:

    0.5 mm

  • Terminal Position:

    QUAD

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Width:

    20 mm

XC6SLX9-2TQG144C Frequently Asked Questions (FAQs)

  • The maximum operating frequency of the XC6SLX9-2TQG144C is 350 MHz.
  • You can implement a DDR3 memory interface using the MIG (Memory Interface Generator) tool provided by Xilinx. The tool generates a customized IP core for the DDR3 interface.
  • The power consumption of the XC6SLX9-2TQG144C depends on the operating frequency, voltage, and design implementation. However, the typical power consumption is around 1.2W to 2.5W.
  • Yes, the XC6SLX9-2TQG144C is suitable for high-reliability applications, such as aerospace, defense, and industrial control systems, due to its radiation-hardened and high-reliability features.
  • To optimize the XC6SLX9-2TQG144C for low power consumption, use techniques such as clock gating, voltage scaling, and dynamic voltage and frequency scaling. Additionally, use the Xilinx Power Analyzer tool to estimate and optimize power consumption.

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XC6SLX9-2TQG144C Overview

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Part Image XC6SLX9-2TQG144I AMD Xilinx

Field Programmable Gate Array, 715 CLBs, 667MHz, 9152-Cell, CMOS, PQFP144

Part Image XC6SLX9-2TQG144C AMD Xilinx

Field Programmable Gate Array, 715 CLBs, 667MHz, 9152-Cell, CMOS, PQFP144

Part Image XC6SLX9-2TQG144I AMD

Field Programmable Gate Array, 715 CLBs, 667MHz, 9152-Cell, CMOS, PQFP144