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XCAU10P-1FFVB676I - AMD

Description: FPGA - Field Programmable Gate Array XCAU10P-1FFVB676I

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XCAU10P-1FFVB676I - AMD - PCB symbol
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XCAU10P-1FFVB676I - AMD PCB footprint - BGA - BGA - FFVB676
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XCAU10P-1FFVB676I - AMD - 3D model - BGA - FFVB676
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XCAU10P-1FFVB676I Details

  • Manufacturer Part Number:

    XCAU10P-1FFVB676I

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Package Description:

    FPBGA-676

  • HTS Code:

    8542.31.00.60

  • Factory Lead Time:

    16 Weeks

  • Manufacturer:

    AMD

  • YTEOL:

    19

  • JESD-30 Code:

    S-PBGA-B676

  • Length:

    27 mm

  • Number of CLBs:

    5500

  • Number of Inputs:

    228

  • Number of Logic Cells:

    96250

  • Number of Outputs:

    228

  • Number of Terminals:

    676

  • Operating Temperature-Max:

    100 °C

  • Operating Temperature-Min:

    -40 °C

  • Organization:

    5500 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    BGA

  • Package Equivalence Code:

    BGA676,26X26,40

  • Package Shape:

    SQUARE

  • Package Style:

    GRID ARRAY

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Seated Height-Max:

    3.52 mm

  • Supply Voltage-Max:

    0.876 V

  • Supply Voltage-Min:

    0.825 V

  • Supply Voltage-Nom:

    0.85 V

  • Surface Mount:

    YES

  • Technology:

    16 nm

  • Terminal Form:

    BALL

  • Terminal Pitch:

    1 mm

  • Terminal Position:

    BOTTOM

  • Width:

    27 mm

XCAU10P-1FFVB676I Frequently Asked Questions (FAQs)

  • The recommended operating temperature range for the XCAU10P-1FFVB676I is 0°C to 100°C, with a junction temperature (TJ) of up to 125°C.
  • To optimize power consumption, use the power gating feature, reduce clock frequency, and minimize voltage supply. Additionally, use the AMD-provided power management IP and follow the guidelines in the Xilinx Power Estimation and Optimization Guide.
  • The maximum current draw for the XCAU10P-1FFVB676I is approximately 15A for the VCCINT supply and 3A for the VCCAUX supply, depending on the operating conditions and configuration.
  • Implement secure boot by using the AMD-provided secure boot IP, generating a secure boot image, and following the guidelines in the Xilinx Secure Boot and Image Encryption User Guide.
  • The maximum bandwidth for the PCIe interface on the XCAU10P-1FFVB676I is x8 Gen3, which provides a bandwidth of up to 9850 MB/s.

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XCAU10P-1FFVB676I Overview

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Part Image XCAU10P-1FFVB676I AMD Xilinx

Field Programmable Gate Array, 96250-Cell, PBGA676