NB3V8312CFAG - onsemi

Description: VDD core supply voltage can be set to 3.3 V, 2.5 V or 1.8 V; VDDO output supply voltage can be set to 3.3 V, 2.5 V, or 1.8 V, with the constraint that VDD >/= VDDO; 250 MHz Maximum Clock Frequency; Accepts LVCMOS, LVTTL Clock Inputs; 12 LVCMOS Clock Outputs; 150 ps Max. Skew Between Outputs; Temp. Range 40C to +85C; 32pin LQFP and QFN Packages; Synchronous Clock Enable