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10AS066H4F34E3SG - Intel

Description: Intel® Arria® 10, IC SOC FPGA 492 I/O 1152FBGA

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PCB Footprints
10AS066H4F34E3SG - Intel PCB footprint - BGA - BGA - 1152-Pin FineLine Ball-Grid Array (FBGA) - Flip Chip - Flat Top Single-Piece Lid - A:3.35
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3D Models
10AS066H4F34E3SG - Intel  - 3D model - BGA - 1152-Pin FineLine Ball-Grid Array (FBGA) - Flip Chip - Flat Top Single-Piece Lid - A:3.35
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10AS066H4F34E3SG Details

  • Manufacturer Part Number:

    10AS066H4F34E3SG

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Transferred

  • Package Description:

    FBGA-1152

  • Country Of Origin:

    Mainland China, Malaysia, Taiwan, USA, Vietnam

  • HTS Code:

    8542.39.00.01

  • Manufacturer:

    Intel Corporation

  • YTEOL:

    10

  • Additional Feature:

    ALSO OPERATES AT 0.95V NOMINAL SUPPLY

  • JESD-30 Code:

    S-PBGA-B1152

  • Length:

    35 mm

  • Number of CLBs:

    25168

  • Number of Inputs:

    384

  • Number of Logic Cells:

    660000

  • Number of Outputs:

    384

  • Number of Terminals:

    1152

  • Operating Temperature-Max:

    100 °C

  • Organization:

    25168 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    BGA

  • Package Equivalence Code:

    BGA1152,34X34,40

  • Package Shape:

    SQUARE

  • Package Style:

    GRID ARRAY

  • Programmable Logic Type:

    FPGA SOC

  • Seated Height-Max:

    3.5 mm

  • Supply Voltage-Max:

    0.93 V

  • Supply Voltage-Min:

    0.87 V

  • Supply Voltage-Nom:

    0.9 V

  • Surface Mount:

    YES

  • Technology:

    20 nm

  • Terminal Form:

    BALL

  • Terminal Pitch:

    0.8 mm

  • Terminal Position:

    BOTTOM

  • Width:

    35 mm

10AS066H4F34E3SG Frequently Asked Questions (FAQs)

  • The 10AS066H4F34E3SG FPGA has an operating temperature range of 0°C to 100°C (commercial temperature range) and -40°C to 100°C (industrial temperature range).
  • Intel recommends using an external POR circuit with a voltage supervisor IC, such as the MAX809, to ensure a reliable power-on reset. The FPGA's internal POR circuit can also be used, but it may not be as reliable.
  • Intel provides guidelines for PCB layout and routing in the FPGA's datasheet and user manual. Key recommendations include using a symmetrical layout, minimizing signal trace lengths, and using differential pairs for high-speed signals.
  • To optimize power consumption, use the Intel Quartus Prime software to optimize the design for power, reduce clock frequencies, and use the FPGA's built-in power management features, such as the Power Manager IP core.
  • The recommended settings for configuration and programming can be found in the FPGA's datasheet and user manual. These include settings for the configuration mode, data width, and clock frequency.

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10AS066H4F34E3SG Overview

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