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10CL006YE144I7G - Intel

Description: FPGA - Field Programmable Gate Array

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10CL006YE144I7G - Intel PCB footprint - Quad Flat Packages - Quad Flat Packages - EQFP 144
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10CL006YE144I7G - Intel  - 3D model - Quad Flat Packages - EQFP 144
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10CL006YE144I7G Details

  • Manufacturer Part Number:

    10CL006YE144I7G

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Transferred

  • Package Description:

    EQFP-144

  • Country Of Origin:

    Mainland China, Malaysia, Taiwan, USA, Vietnam

  • ECCN Code:

    EAR99

  • HTS Code:

    8542.39.00.01

  • Manufacturer:

    Intel Corporation

  • YTEOL:

    9

  • JESD-30 Code:

    S-PQFP-G144

  • JESD-609 Code:

    e3

  • Length:

    20 mm

  • Moisture Sensitivity Level:

    3

  • Number of CLBs:

    392

  • Number of Terminals:

    144

  • Operating Temperature-Max:

    100 °C

  • Operating Temperature-Min:

    -40 °C

  • Organization:

    392 CLBS

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Code:

    HLFQFP

  • Package Shape:

    SQUARE

  • Package Style:

    FLATPACK, HEAT SINK/SLUG, LOW PROFILE, FINE PITCH

  • Peak Reflow Temperature (Cel):

    260

  • Programmable Logic Type:

    FIELD PROGRAMMABLE GATE ARRAY

  • Seated Height-Max:

    1.65 mm

  • Supply Voltage-Max:

    1.25 V

  • Supply Voltage-Min:

    1.15 V

  • Supply Voltage-Nom:

    1.2 V

  • Surface Mount:

    YES

  • Technology:

    60 nm

  • Temperature Grade:

    INDUSTRIAL

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    GULL WING

  • Terminal Pitch:

    0.5 mm

  • Terminal Position:

    QUAD

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Width:

    20 mm

10CL006YE144I7G Frequently Asked Questions (FAQs)

  • The maximum power consumption of the 10CL006YE144I7G is approximately 2.5W, but this can vary depending on the specific application and usage.
  • To implement a CDC in the 10CL006YE144I7G, you can use the Intel Quartus Prime software to synchronize clock domains using asynchronous FIFOs or synchronizers. You can also use the built-in CDC IP cores provided by Intel.
  • The maximum frequency of the 10CL006YE144I7G depends on the specific application and the speed grade of the device. However, the maximum frequency is typically around 500 MHz to 1 GHz.
  • To optimize the 10CL006YE144I7G for low power consumption, you can use various techniques such as clock gating, voltage scaling, and dynamic voltage and frequency scaling. You can also use the Intel Quartus Prime software to optimize the design for power consumption.
  • The 10CL006YE144I7G has a total of 6,480 logic elements (LEs) available.

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10CL006YE144I7G Overview

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