Description:The 72V263 16K x 9/8K x 18 SuperSync II FIFO memory has flexible x9/x18 Bus-Matching on both read and write ports. The variable clock cycle counting delay associated with the latency period found on previous SuperSync devices has been eliminated. SuperSync II FIFOs are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match buses of unequal sizes.
IT CAN ALSO BE CONFIGURED AS 16K X 9; RETRANSMIT; ASYNCHRONOUS MODE IS ALSO POSSIBLE
Alternate Memory Width:
9
Clock Frequency-Max (fCLK):
166 MHz
Cycle Time:
6 ns
JESD-30 Code:
S-PQFP-G80
JESD-609 Code:
e3
Length:
14 mm
Memory Density:
147456 bit
Memory IC Type:
OTHER FIFO
Memory Width:
18
Moisture Sensitivity Level:
3
Number of Functions:
1
Number of Terminals:
80
Number of Words:
8192 words
Number of Words Code:
8000
Operating Mode:
SYNCHRONOUS
Operating Temperature-Max:
70 °C
Organization:
8KX18
Output Enable:
YES
Package Body Material:
PLASTIC/EPOXY
Package Code:
LQFP
Package Equivalence Code:
QFP80,.64SQ
Package Shape:
SQUARE
Package Style:
FLATPACK, LOW PROFILE
Parallel/Serial:
PARALLEL
Peak Reflow Temperature (Cel):
260
Qualification Status:
Not Qualified
Seated Height-Max:
1.6 mm
Standby Current-Max:
0.015 A
Supply Current-Max:
0.035 mA
Supply Voltage-Max (Vsup):
3.45 V
Supply Voltage-Min (Vsup):
3.15 V
Supply Voltage-Nom (Vsup):
3.3 V
Surface Mount:
YES
Technology:
CMOS
Temperature Grade:
COMMERCIAL
Terminal Finish:
Matte Tin (Sn) - annealed
Terminal Form:
GULL WING
Terminal Pitch:
0.65 mm
Terminal Position:
QUAD
Time@Peak Reflow Temperature-Max (s):
30
Width:
14 mm
72V263L6PFG Frequently Asked Questions (FAQs)
Renesas provides a recommended PCB layout guide in their application notes (e.g., AN9834) and evaluation board documentation. It's essential to follow these guidelines to ensure proper signal integrity, power supply decoupling, and thermal management.
The 72V263L6PFG has an internal POR and BOD circuit. To implement POR, connect the VCC pin to a power supply with a suitable voltage regulator. For BOD, connect the VCC pin to a voltage regulator with a brown-out detection feature. You can also use external POR and BOD circuits if required.
The 72V263L6PFG has an operating temperature range of -40°C to +85°C. However, it's essential to consider the junction temperature (Tj) and ensure it doesn't exceed 150°C during operation.
Renesas recommends following proper ESD handling procedures during device handling and assembly. Use ESD-protective packaging, wrist straps, and mats. The device also has internal ESD protection diodes, but external protection devices may be necessary depending on the application.
Store the 72V263L6PFG in a dry, cool place with a temperature range of -40°C to +30°C and relative humidity below 60%. Avoid exposing the device to direct sunlight, moisture, or extreme temperatures.
Trust Checks
This model has been built in collaboration with the manufacturer.
Manufacturer Collaborated
This model has been verified by system checks.
System Verified
This model has been reviewed by community users.
Community Approved
Sponsored
72V263L6PFG Overview
Use the download button to access the 72V263L6PFG schematic symbol, PCB footprint, and 3D model.
To find more CAD model downloads similar to this part, try a partial part number search, like 72V26,
or try a keyword search, such as FIFOs
