AD7960BCPZ - Analog Devices

AD7960BCPZ Frequently Asked Questions (FAQs)

• What is the recommended layout and routing for the AD7960BCPZ?
  A good layout and routing for the AD7960BCPZ involves keeping the analog and digital grounds separate, using a solid ground plane, and minimizing the length of the analog signal traces. It's also recommended to use a 4-layer PCB with a dedicated analog power plane and a dedicated digital power plane.
• How do I optimize the performance of the AD7960BCPZ in a noisy environment?
  To optimize the performance of the AD7960BCPZ in a noisy environment, use a low-pass filter at the input, use a shielded cable for the analog input, and consider using a common-mode filter or a differential amplifier to reject common-mode noise. Additionally, ensure that the analog and digital grounds are properly separated and decoupled.
• What is the recommended power-up sequence for the AD7960BCPZ?
  The recommended power-up sequence for the AD7960BCPZ is to power up the analog supply (AVDD) first, followed by the digital supply (DVDD), and then the clock signal. This ensures that the analog circuitry is stable before the digital circuitry is enabled.
• How do I handle the output data from the AD7960BCPZ?
  The AD7960BCPZ outputs 16-bit data in a serial format. The output data can be handled by using a microcontroller or an FPGA to receive and process the data. The data can be processed in real-time or stored in a memory for later processing.
• What is the maximum sampling rate of the AD7960BCPZ?
  The maximum sampling rate of the AD7960BCPZ is 250 kSPS. However, the actual sampling rate may be limited by the system clock frequency and the conversion time of the ADC.