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AD9640ABCPZRL7-80 - Analog Devices

Description: Analog to Digital Converters - ADC 14Bit 80Msps Dual 1.8V PB Free ADC

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AD9640ABCPZRL7-80 - Analog Devices PCB footprint - Quad Flat No-Lead - Quad Flat No-Lead - [LFCSP_VQ] (CP-64-6)
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AD9640ABCPZRL7-80 - Analog Devices  - 3D model - Quad Flat No-Lead - [LFCSP_VQ] (CP-64-6)
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AD9640ABCPZRL7-80 Details

  • Manufacturer Part Number:

    AD9640ABCPZRL7-80

  • Source Url Status Check Date:

    2013-05-01 14:56:31.433

  • Brand Name:

    Analog Devices Inc

  • Pbfree Code:

    No

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    QFN

  • Package Description:

    HVQCCN-64

  • Pin Count:

    64

  • Manufacturer Package Code:

    CP-64-6

  • Country Of Origin:

    Singapore

  • ECCN Code:

    3A991.C.3

  • HTS Code:

    8542.39.00.01

  • Manufacturer:

    Analog Devices Inc

  • YTEOL:

    10

  • Analog Input Voltage-Max:

    1.75 V

  • Conversion Time-Max:

    0.0058 µs

  • Converter Type:

    ADC, FLASH METHOD

  • JESD-30 Code:

    S-XQCC-N64

  • JESD-609 Code:

    e3

  • Length:

    9 mm

  • Linearity Error-Max (EL):

    0.011%

  • Moisture Sensitivity Level:

    3

  • Number of Analog In Channels:

    2

  • Number of Bits:

    14

  • Number of Functions:

    1

  • Number of Terminals:

    64

  • Operating Temperature-Max:

    85 °C

  • Operating Temperature-Min:

    -40 °C

  • Output Bit Code:

    OFFSET BINARY, 2S COMPLEMENT BINARY, GRAY CODE

  • Output Format:

    PARALLEL, WORD

  • Package Body Material:

    UNSPECIFIED

  • Package Code:

    HVQCCN

  • Package Equivalence Code:

    LCC64,.35SQ,20

  • Package Shape:

    SQUARE

  • Package Style:

    CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE

  • Qualification Status:

    Not Qualified

  • Sample Rate:

    170 MHz

  • Sample and Hold / Track and Hold:

    SAMPLE

  • Seated Height-Max:

    1 mm

  • Supply Voltage-Nom:

    1.8 V

  • Surface Mount:

    YES

  • Temperature Grade:

    INDUSTRIAL

  • Terminal Finish:

    Matte Tin (Sn)

  • Terminal Form:

    NO LEAD

  • Terminal Pitch:

    0.5 mm

  • Terminal Position:

    QUAD

  • Width:

    9 mm

AD9640ABCPZRL7-80 Frequently Asked Questions (FAQs)

  • The recommended PCB layout for the AD9640 can be found in the AD9640 Evaluation Board documentation, which includes a detailed layout guide and Gerber files. It's essential to follow the recommended layout to ensure optimal performance and minimize noise.
  • The analog input stage of the AD9640 can be optimized by selecting the appropriate input termination, gain, and filtering based on the specific application requirements. Analog Devices provides an Analog Input Stage Optimization Tool that can help with this process.
  • The maximum clock frequency that can be used with the AD9640 is 640 MHz, but it's recommended to use a clock frequency of 500 MHz or less to ensure optimal performance and minimize jitter.
  • The digital output data from the AD9640 can be handled using a variety of methods, including using an FPGA, ASIC, or microcontroller. Analog Devices provides example code and design files for popular platforms, such as Xilinx FPGAs and Intel FPGAs.
  • The power consumption of the AD9640 varies depending on the operating mode and clock frequency. To reduce power consumption, consider using the low-power mode, reducing the clock frequency, or using a lower supply voltage. Analog Devices provides power consumption estimates and guidelines in the datasheet and application notes.

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AD9640ABCPZRL7-80 Overview

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About Analog Devices

Analog Devices Inc. is a global leader in the design and manufacturing of analog, mixed-signal, and digital signal processing integrated circuits and software solutions for the industrial, automotive, healthcare, communications industries. Analog Devices serves a diverse range of markets including industrial, automotive, healthcare, energy, aerospace, defense, and consumer electronics industries. Analog Devices’ product portfolio includes a wide range of ICs, modules, and subsystems.

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