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AFGB40T65SQDN - onsemi

Description: AEC-Q101 qualified; VCE(sat) = 1.6 V (typ.) @ IC = 40 A; Low VF soft recovery co-packaged diode

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PCB Footprints
AFGB40T65SQDN - onsemi PCB footprint - Other - Other - D2PAK−3 (TO−263, 3−LEAD) CASE 418AJ ISSUE C
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3D Models
AFGB40T65SQDN - onsemi  - 3D model - Other - D2PAK−3 (TO−263, 3−LEAD) CASE 418AJ ISSUE C
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AFGB40T65SQDN Details

  • Manufacturer Part Number:

    AFGB40T65SQDN

  • Brand Name:

    onsemi

  • Pbfree Code:

    Yes

  • Rohs Code:

    Yes

  • Part Life Cycle Code:

    Active

  • Part Package Code:

    D2PAK-3 / TO-263-2

  • Manufacturer Package Code:

    418AJ

  • Country Of Origin:

    Mainland China

  • ECCN Code:

    EAR99

  • Factory Lead Time:

    13 Weeks

  • Manufacturer:

    onsemi

  • YTEOL:

    5.82

  • Case Connection:

    COLLECTOR

  • Collector Current-Max (IC):

    80 A

  • Collector-Emitter Voltage-Max:

    650 V

  • Configuration:

    SINGLE WITH BUILT-IN DIODE

  • Gate-Emitter Thr Voltage-Max:

    6.4 V

  • Gate-Emitter Voltage-Max:

    20 V

  • JEDEC-95 Code:

    TO-263AB

  • JESD-30 Code:

    R-PSSO-G2

  • JESD-609 Code:

    e3

  • Moisture Sensitivity Level:

    1

  • Number of Elements:

    1

  • Number of Terminals:

    2

  • Operating Temperature-Max:

    175 °C

  • Operating Temperature-Min:

    -55 °C

  • Package Body Material:

    PLASTIC/EPOXY

  • Package Shape:

    RECTANGULAR

  • Package Style:

    SMALL OUTLINE

  • Peak Reflow Temperature (Cel):

    260

  • Polarity/Channel Type:

    N-CHANNEL

  • Power Dissipation-Max (Abs):

    238 W

  • Reference Standard:

    AEC-Q101

  • Surface Mount:

    YES

  • Terminal Finish:

    Matte Tin (Sn) - annealed

  • Terminal Form:

    GULL WING

  • Terminal Position:

    SINGLE

  • Time@Peak Reflow Temperature-Max (s):

    30

  • Transistor Application:

    POWER CONTROL

  • Transistor Element Material:

    SILICON

  • VCEsat-Max:

    2.1 V

AFGB40T65SQDN Frequently Asked Questions (FAQs)

  • A 2-layer or 4-layer PCB with a thermal relief pattern and a solid ground plane is recommended. Ensure a minimum of 1 oz copper thickness and a thermal via array under the device to facilitate heat dissipation.
  • Implement a robust thermal management system, including a heat sink, thermal interface material, and a cooling fan if necessary. Monitor junction temperature (TJ) and adjust the system design accordingly.
  • Use a shielded enclosure, ensure proper grounding, and implement EMI filters on input and output lines. Follow onsemi's recommended PCB layout guidelines and consider using a common-mode choke.
  • Use a dedicated gate driver IC, ensure a low-impedance gate drive circuit, and optimize the gate resistance (RG) for the specific application. Consider using a gate drive transformer for high-frequency applications.
  • Ensure identical devices, identical thermal management, and identical gate drive circuits. Implement a master-slave configuration, and consider using a current-sharing bus to balance the current between devices.

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AFGB40T65SQDN Overview

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